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Merge pull request #524 from OlegHahm/board_cleanup

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Board cleanup
This commit is contained in:
Oleg Hahm 2014-01-21 06:07:32 -08:00
commit d519696ec7
14 changed files with 83 additions and 440 deletions
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9
boards/msba2-common/board_common_init.c
View File

@ -42,6 +42,7 @@ and the mailinglist (subscription via web site)
*/
#include <string.h>
#include "board.h"
#include "msba2_common.h"
#include "lpc23xx.h"
#include "cpu.h"
#include "config.h"
@ -64,14 +65,6 @@ init_mam(void)
MAMCR = 0x0002;
}
/*---------------------------------------------------------------------------*/
static inline void
pllfeed(void)
{
PLLFEED = 0xAA;
PLLFEED = 0x55;
}
void init_clks2(void)
{
// Wait for the PLL to lock to set frequency

32
boards/msba2-common/include/msba2_common.h
View File

@ -1,29 +1,3 @@
/*
Copyright 2008, Freie Universitaet Berlin (FUB). All rights reserved.
These sources were developed at the Freie Universitaet Berlin, Computer Systems
and Telematics group (http://cst.mi.fu-berlin.de).
-------------------------------------------------------------------------------
This file is part of FeuerWare.
This program is free software: you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free Software
Foundation, either version 3 of the License, or (at your option) any later
version.
FeuerWare is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with
this program. If not, see http://www.gnu.org/licenses/ .
--------------------------------------------------------------------------------
For further information and questions please use the web site
http://scatterweb.mi.fu-berlin.de
and the mailinglist (subscription via web site)
scatterweb@lists.spline.inf.fu-berlin.de
*******************************************************************************/
/**
* @defgroup boards_msba2-common MSB-A2 common
* @ingroup boards
@ -45,5 +19,11 @@ and the mailinglist (subscription via web site)
#define VICIntEnClear VICIntEnClr
static inline void pllfeed(void)
{
PLLFEED = 0xAA;
PLLFEED = 0x55;
}
/** @} */
#endif // __MSBA2_COMMON_H

7
boards/msba2/board_init.c
View File

@ -67,13 +67,6 @@ void bl_init_ports(void)
bl_blink();
}
static inline void
pllfeed(void)
{
PLLFEED = 0xAA;
PLLFEED = 0x55;
}
void init_clks1(void)
{
// Disconnect PLL

88
boards/olimex_lpc2148/board_init.c
View File

@ -1,88 +0,0 @@
/*
* bl_board_init.c
*
* Created on: 19.08.2008
* Author: heiko, kaspar
*/
#include "cpu.h"
#include "bits.h"
#include "VIC.h"
#define PLOCK 0x400
static void feed(void)
{
PLL0FEED = 0xAA;
PLL0FEED = 0x55;
}
void bl_init_clks(void)
{
// Setting the Phased Lock Loop (PLL)
// ----------------------------------
//
// Olimex LPC-P2148 has a 12.0000 mhz crystal
//
// We'd like the LPC2148 to run at 60 mhz (has to be an even multiple of crystal)
//
// According to the Philips LPC2148 manual: M = cclk / Fosc where: M = PLL multiplier (bits 0-4 of PLLCFG)
// cclk = 60000000 hz
// Fosc = 12000000 hz
//
// Solving: M = 60000000 / 12000000 = 5
//
// Note: M - 1 must be entered into bits 0-4 of PLLCFG (assign 4 to these bits)
//
//
// The Current Controlled Oscilator (CCO) must operate in the range 156 mhz to 320 mhz
//
// According to the Philips LPC2148 manual: Fcco = cclk * 2 * P where: Fcco = CCO frequency
// cclk = 60000000 hz
// P = PLL divisor (bits 5-6 of PLLCFG)
//
// Solving: Fcco = 60000000 * 2 * P
// P = 2 (trial value)
// Fcco = 60000000 * 2 * 2
// Fcc0 = 240000000 hz (good choice for P since it's within the 156 mhz to 320 mhz range)
//
// From Table 22 (page 34) of Philips LPC2148 manual P = 2, PLLCFG bits 5-6 = 1 (assign 1 to these bits)
//
// Finally: PLLCFG = 0 01 00100 = 0x24
//
// Final note: to load PLLCFG register, we must use the 0xAA followed 0x55 write sequence to the PLLFEED register
// this is done in the short function feed() below
//
// Setting Multiplier and Divider values
PLL0CFG = 0x24;
feed();
// Enabling the PLL */
PLL0CON = 0x1;
feed();
// Wait for the PLL to lock to set frequency
while (!(PLL0STAT & PLOCK)) ;
// Connect the PLL as the clock source
PLL0CON = 0x3;
feed();
// Enabling MAM and setting number of clocks used for Flash memory fetch
MAMTIM = 0x3;
MAMCR = 0x2;
// Setting peripheral Clock (pclk) to 1/2 System Clock (cclk)
VPBDIV = PCLK_DIV;
}
void bl_init_ports(void)
{
}

14
boards/olimex_lpc2148/debug_uart.c
View File

@ -1,14 +0,0 @@
#include "lpc214x.h"
#include "bits.h"
#include "rs232.h"
void debug_putchar(int character)
{
UART1WriteChar(character);
}
void bl_uart_init(void)
{
UART1Initialize(115200U);
}

30
boards/olimex_lpc2148/include/board.h
View File

@ -1,30 +0,0 @@
/*
* Copyright (C) 2013 Freie Universität Berlin
*
* This file subject to the terms and conditions of the GNU Lesser General
* Public License. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @defgroup boards_olimex_lpc2148 Olimex LPC2148
* @ingroup boards
* @brief Support for the Olimex LPC2148 board
* @{
*
* @file board.h
* @brief Basic definitions for the Olimex LPC2148 board
*
* @author unknown
*/
#ifndef __OLIMEX_LPC2148_H
#define __OLIMEX_LPC2148_H
#include <stdint.h>
#include "lpc2148.h"
typedef uint8_t radio_packet_length_t;
/** @} */
#endif /* __OLIMEX_LPC2148_H */

40
boards/olimex_lpc2148/include/rs232.h
View File

@ -1,40 +0,0 @@
//rs232.h
//#include <iolpc2138.h>
#include "lpc214x.h"
//#define OSCILLATOR_CLOCK_FREQUENCY 14745600 //in MHz
#define OSCILLATOR_CLOCK_FREQUENCY 12000000 //in MHz
//get real processor clock frequency
unsigned int processorClockFrequency(void);
//get peripheral clock frequency
unsigned int peripheralClockFrequency(void);
/**** UART0 ****/
//initialize UART0 interface
void UART0Initialize(unsigned int baud);
//write char to UART0 (RS232);
void UART0WriteChar(int ch0);
//read char from RS232
unsigned char UART0ReadChar(void);
//this function read/write char from RS232,
//but they not wait to read/write
unsigned char UART0ReadChar_nostop(void);
void UART0WriteChar_nostop(unsigned char ch0);
/**** UART1 ****/
//initialize UART0 interface
void UART1Initialize(unsigned int baud);
//write char to UART0 (RS232);
void UART1WriteChar(int ch0);
//read char from RS232
unsigned char UART0ReadChar(void);
//this function read/write char from RS232,
//but they not wait to read/write
unsigned char UART1ReadChar_nostop(void);
void UART1WriteChar_nostop(unsigned char ch0);

75
boards/olimex_lpc2148/rs232.c
View File

@ -1,75 +0,0 @@
//rs232.c
#include "rs232.h"
unsigned int processorClockFrequency(void)
{
//return real processor clock speed
return OSCILLATOR_CLOCK_FREQUENCY * (PLL0CON & 1 ? (PLL0CFG & 0xF) + 1 : 1);
}
unsigned int peripheralClockFrequency(void)
{
//VPBDIV - determines the relationship between the processor clock (cclk)
//and the clock used by peripheral devices (pclk).
unsigned int divider = 0;
switch (VPBDIV & 3) {
case 0:
divider = 4;
break;
case 1:
divider = 1;
break;
case 2:
divider = 2;
break;
}
return processorClockFrequency() / divider;
}
/**** UART0 ****/
void UART1Initialize(unsigned int baud)
{
unsigned int divisor = peripheralClockFrequency() / (16 * baud);
//set Line Control Register (8 bit, 1 stop bit, no parity, enable DLAB)
// U0LCR_bit.WLS = 0x3; //8 bit
// U0LCR_bit.SBS = 0x0; //1 stop bit
// U0LCR_bit.PE = 0x0; //no parity
// U0LCR_bit.DLAB = 0x1; //enable DLAB
//with one row
U1LCR = 0x83;
//devisor
U1DLL = divisor & 0xFF;
U1DLM = (divisor >> 8) & 0xFF;
U1LCR &= ~0x80;
//set functionalite to pins: port0.0 -> TX0, port0.1 -> RXD0
// PINSEL0_bit.P0_0 = 0x1;
// PINSEL0_bit.P0_1 = 0x1;
//with one row
PINSEL0 |= BIT16;
PINSEL0 &= ~BIT17;
}
void UART1WriteChar(int ch0)
{
while (!(U1LSR & BIT5));
U1THR = ch0;
}
unsigned char UART0ReadChar(void)
{
//when U0LSR_bit.DR is 1 - U0RBR contains valid data
// while (U0LSR_bit.DR == 0);
return U0RBR;
}

63
boards/olimex_lpc2148/tick.c
View File

@ -1,63 +0,0 @@
/* Copyright (C) 2005, 2006, 2007, 2008 by Thomas Hillebrandt and Heiko Will
This file is part of the Micro-mesh SensorWeb Firmware.
Micro-Mesh is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
Micro-Mesh is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Micro-Mesh; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "lpc214x.h"
#include "bits.h"
//#include "tick.h"
#include "minimal_dbg_console.h"
#include "VIC.h"
void Timer0_IRQHandler(void) __attribute__((interrupt("IRQ")));
extern void eINT();
extern void dINT();
void driver_timer_load(void)
{
T0TCR = 0; // Disable timer 0.
T0PR = 3000; // Prescaler is set to relevant pclk , counter is incremented every T0PR tact.
T0CCR = 0; // Capture is disabled.
T0EMR = 0; // No external match output.
T0TC = 0;
T0MR0 = 1000;
T0MCR |= BIT0 + BIT1;
T0TCR = BIT0; // Enable timer 0.
dINT(); // Disable all interrupts
VICIntEnable = BIT4; // Enable Interrupthandling for Timer0
VICVectCntl3 = 4 + BIT5; // Assign Timer0 to IRQ Slot 3
VICVectAddr3 = (unsigned int)Timer0_IRQHandler; // Assign Isr Address
eINT();
}
int counter = 0;
void Timer0_IRQHandler(void)
{
extern unsigned int sched_context_switch_request;
counter++;
T0IR |= 0xff; // reset timer1 interrupt flag
sl_printf("#");
sched_context_switch_request = 1;
VICVectAddr = 0; // acknowledge interrupt (if using VIC IRQ)
}

22
boards/olimex_lpc2148/tools/lpc2148_flash.gdb
View File

@ -1,22 +0,0 @@
#winheight regs 11
set history save on
set history size 1000
target remote localhost:3333
monitor reset
monitor sleep 100
monitor halt
monitor poll
#monitor arm7_9 sw_bkpts disable
#monitor arm7_9 force_hw_bkpts enable
monitor mww 0xE01FC040 0x0001
monitor mdw 0xE01FC040
monitor flash erase_sector 0 0 14
#monitor flash auto_erase on
monitor flash erase_check 0
#monitor flash write_image /home/kaspar/FeuerWhere/src/x/bin/arm.elf
set remote hardware-watchpoint-limit 2
load
break bootloader
mon soft_reset_halt
continue
d b 1

12
boards/pttu/Makefile Normal file
View File

@ -0,0 +1,12 @@
MODULE =$(BOARD)_base
INCLUDES += -I$(RIOTBASE)/drivers/cc110x
DIRS = $(RIOTBOARD)/msba2-common
all: $(BINDIR)$(MODULE).a
@for i in $(DIRS) ; do "$(MAKE)" -C $$i ; done ;
include $(RIOTBASE)/Makefile.base
clean::
@for i in $(DIRS) ; do "$(MAKE)" -C $$i clean ; done ;

4
boards/pttu/Makefile.include Normal file
View File

@ -0,0 +1,4 @@
export INCLUDES += -I$(RIOTBOARD)/pttu/include
include $(RIOTBOARD)/msba2-common/Makefile.include

99
boards/pttu/board_init.c
View File

@ -1,56 +1,73 @@
/******************************************************************************
Copyright 2008-2009, Freie Universitaet Berlin (FUB). All rights reserved.
These sources were developed at the Freie Universitaet Berlin, Computer Systems
and Telematics group (http://cst.mi.fu-berlin.de).
-------------------------------------------------------------------------------
This file is part of FeuerWare.
This program is free software: you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free Software
Foundation, either version 3 of the License, or (at your option) any later
version.
FeuerWare is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with
this program. If not, see http://www.gnu.org/licenses/ .
--------------------------------------------------------------------------------
For further information and questions please use the web site
http://scatterweb.mi.fu-berlin.de
and the mailinglist (subscription via web site)
scatterweb@lists.spline.inf.fu-berlin.de
*******************************************************************************/
/*
* Copyright (C) 2013 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup pttu
* @ingroup pttu
* @{
*/
/**
* @file
* @brief PTTU board initialization
* @brief PTTU board initialization
*
* @author Freie Universität Berlin, Computer Systems & Telematics, FeuerWhere project
* @author Heiko Will
* @author Kaspar Schleiser
* @author Heiko Will
* @author Kaspar Schleiser
*
*/
#include "board.h"
#include "msba2_common.h"
#include "VIC.h"
#include "cpu.h"
#define PCRTC BIT9
#define CL_CPU_DIV 4
/*---------------------------------------------------------------------------*/
void init_clks1(void)
{
// Disconnect PLL
PLLCON &= ~0x0002;
pllfeed();
while (PLLSTAT & BIT25); // wait until PLL is disconnected before disabling - deadlock otherwise
// Disable PLL
PLLCON &= ~0x0001;
pllfeed();
while (PLLSTAT & BIT24); // wait until PLL is disabled
SCS |= 0x20; // Enable main OSC
while( !(SCS & 0x40) ); // Wait until main OSC is usable
/* select main OSC, 16MHz, as the PLL clock source */
CLKSRCSEL = 0x0001;
// Setting Multiplier and Divider values
PLLCFG = 0x0008; // M=9 N=1 Fcco = 288 MHz
pllfeed();
// Enabling the PLL */
PLLCON = 0x0001;
pllfeed();
/* Set clock divider to 4 (value+1) */
CCLKCFG = CL_CPU_DIV - 1; // Fcpu = 72 MHz
#if USE_USB
USBCLKCFG = USBCLKDivValue; /* usbclk = 288 MHz/6 = 48 MHz */
#endif
}
void bl_init_ports(void)
{
SCS |= BIT0; // Set IO Ports to fast switching mode
SCS |= BIT0; // Set IO Ports to fast switching mode
/* UART0 */
PINSEL0 |= BIT4 + BIT6; // RxD0 and TxD0
PINSEL0 |= BIT4 + BIT6; // RxD0 and TxD0
PINSEL0 &= ~(BIT5 + BIT7);
/*Turn Board on*/
@ -94,24 +111,24 @@ void bl_init_ports(void)
PINSEL9 |= BIT24 + BIT25 + BIT26 + BIT27; //4.28 & 4.29 as Uart3
// Nanotron
FIO2DIR &= ~BIT8; // nanotron uC IRQ as input
FIO1DIR |= BIT15; // nanotron power on reset
FIO1DIR &= ~BIT14; // nanotron uC RESET as input
FIO1DIR &= ~BIT10; // nanotron uC Vcc as input
FIO1DIR |= BIT9; // nanotron ENABLE as output
FIO1DIR &= ~BIT4; // nanotron Rx/Tx as input
FIO2DIR &= ~BIT8; // nanotron uC IRQ as input
FIO1DIR |= BIT15; // nanotron power on reset
FIO1DIR &= ~BIT14; // nanotron uC RESET as input
FIO1DIR &= ~BIT10; // nanotron uC Vcc as input
FIO1DIR |= BIT9; // nanotron ENABLE as output
FIO1DIR &= ~BIT4; // nanotron Rx/Tx as input
FIO1CLR = BIT15;
FIO1CLR = BIT9; // Enable power
FIO1CLR = BIT9; // Enable power
PINMODE1 |= BIT1; // No Pullup for CS
FIO0DIR |= BIT16; // CS as output
FIO0SET = BIT16; // drive cs inactive
FIO0SET = BIT16; // drive cs inactive
FIO0DIR |= BIT18 + BIT15; // SPi Output
// RFID
FIO1DIR |= BIT1; // RFID Power
FIO1CLR = BIT1; //
FIO1CLR = BIT1; //
FIO0DIR |= BIT1; // RFID Reset
FIO0SET = BIT1; // Hold in Reset

28
boards/pttu/include/board.h
View File

@ -1,29 +1,3 @@
/*
Copyright 2008-2009, Freie Universitaet Berlin (FUB). All rights reserved.
These sources were developed at the Freie Universitaet Berlin, Computer Systems
and Telematics group (http://cst.mi.fu-berlin.de).
-------------------------------------------------------------------------------
This file is part of FeuerWare.
This program is free software: you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free Software
Foundation, either version 3 of the License, or (at your option) any later
version.
FeuerWare is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with
this program. If not, see http://www.gnu.org/licenses/ .
--------------------------------------------------------------------------------
For further information and questions please use the web site
http://scatterweb.mi.fu-berlin.de
and the mailinglist (subscription via web site)
scatterweb@lists.spline.inf.fu-berlin.de
*******************************************************************************/
/**
* @defgroup boards_pttu PTTU
* @ingroup boards
@ -40,6 +14,8 @@ and the mailinglist (subscription via web site)
#ifndef __BOARD_H
#define __BOARD_H
#include <stdint.h>
#include "lpc2387.h"
#include "cpu-conf.h"