From 31604da8fe10796fbaeb16903c8b6fd948459340 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 19 Jan 2023 08:10:53 +0100 Subject: [PATCH 1/8] boards/common: add common definitions for GD32VF103 boards --- boards/common/gd32v/Kconfig | 20 +++++ boards/common/gd32v/Makefile.dep | 0 boards/common/gd32v/Makefile.features | 1 + boards/common/gd32v/Makefile.include | 14 +++ .../gd32v}/dist/openocd.cfg | 0 boards/common/gd32v/doc.txt | 17 ++++ .../common/gd32v/include/cfg_timer_default.h | 88 +++++++++++++++++++ .../common/gd32v/include/cfg_uart_default.h | 55 ++++++++++++ .../common/gd32v/include/periph_common_conf.h | 42 +++++++++ cpu/gd32v/Makefile.include | 2 + cpu/gd32v/clock.c | 4 - dist/tools/doccheck/generic_exclude_patterns | 6 ++ 12 files changed, 245 insertions(+), 4 deletions(-) create mode 100644 boards/common/gd32v/Kconfig create mode 100644 boards/common/gd32v/Makefile.dep create mode 100644 boards/common/gd32v/Makefile.features create mode 100644 boards/common/gd32v/Makefile.include rename boards/{seeedstudio-gd32 => common/gd32v}/dist/openocd.cfg (100%) create mode 100644 boards/common/gd32v/doc.txt create mode 100644 boards/common/gd32v/include/cfg_timer_default.h create mode 100644 boards/common/gd32v/include/cfg_uart_default.h create mode 100644 boards/common/gd32v/include/periph_common_conf.h diff --git a/boards/common/gd32v/Kconfig b/boards/common/gd32v/Kconfig new file mode 100644 index 0000000000..dfd5106d70 --- /dev/null +++ b/boards/common/gd32v/Kconfig @@ -0,0 +1,20 @@ +# Copyright (c) 2023 Gunar Schorcht +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. +# + +config BOARD_HAS_HXTAL + bool + help + Indicates that the board is providing an HXTAL oscillator + +config BOARD_HAS_LXTAL + bool + help + Indicates that the board is providing an LXTAL oscillator + +config CLOCK_HXTAL + int + default 8000000 diff --git a/boards/common/gd32v/Makefile.dep b/boards/common/gd32v/Makefile.dep new file mode 100644 index 0000000000..e69de29bb2 diff --git a/boards/common/gd32v/Makefile.features b/boards/common/gd32v/Makefile.features new file mode 100644 index 0000000000..3a51e118f3 --- /dev/null +++ b/boards/common/gd32v/Makefile.features @@ -0,0 +1 @@ +CPU = gd32v diff --git a/boards/common/gd32v/Makefile.include b/boards/common/gd32v/Makefile.include new file mode 100644 index 0000000000..9a0807abd5 --- /dev/null +++ b/boards/common/gd32v/Makefile.include @@ -0,0 +1,14 @@ +# include this module into the build +INCLUDES += -I$(RIOTBOARD)/common/gd32v/include + +# configure the serial interface +PORT_LINUX ?= /dev/ttyUSB0 +PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*))) + +# configure the flasher +PROGRAMMER ?= openocd +OPENOCD_CONFIG ?= $(RIOTBOARD)/common/gd32v/dist/openocd.cfg +OPENOCD_DEBUG_ADAPTER ?= ftdi +OPENOCD_FTDI_ADAPTER ?= openocd-usb +OPENOCD_TRANSPORT = jtag +OPENOCD_RESET_USE_CONNECT_ASSERT_SRST = 1 diff --git a/boards/seeedstudio-gd32/dist/openocd.cfg b/boards/common/gd32v/dist/openocd.cfg similarity index 100% rename from boards/seeedstudio-gd32/dist/openocd.cfg rename to boards/common/gd32v/dist/openocd.cfg diff --git a/boards/common/gd32v/doc.txt b/boards/common/gd32v/doc.txt new file mode 100644 index 0000000000..6ff30b528e --- /dev/null +++ b/boards/common/gd32v/doc.txt @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @defgroup boards_common_gd32v GD32V Common Configuration + * @ingroup boards_common + * @brief Definitions and configurations that are common for + * all GD32VF103 boards. + * + * All boards using a MCU from the GD32VF103 family share some parts of their + * configuration. + */ diff --git a/boards/common/gd32v/include/cfg_timer_default.h b/boards/common/gd32v/include/cfg_timer_default.h new file mode 100644 index 0000000000..180f2cf563 --- /dev/null +++ b/boards/common/gd32v/include/cfg_timer_default.h @@ -0,0 +1,88 @@ +/* + * Copyright (C) 2020 Koen Zandberg + * 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_gd32v + * @{ + * + * @file + * @brief Default timer configuration for GD32VF103 boards + * + * @author Koen Zandberg + * @author Gunar Schorcht + */ + +#ifndef CFG_TIMER_DEFAULT_H +#define CFG_TIMER_DEFAULT_H + +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Timer configuration + * + * All GD32VF103xx variants have at least one advanced timer TIMER0 and two + * general timers TIMER1 and TIMER2. GD32VF10x8 and GD32VF10xB have two + * additional general timers TIMER3 and TIMER4. + * + * @{ + */ +static const timer_conf_t timer_config[] = { + { + .dev = TIMER1, + .max = 0x0000ffff, + .rcu_mask = RCU_APB1EN_TIMER1EN_Msk, + .bus = APB1, + .irqn = TIMER1_IRQn + }, + { + .dev = TIMER2, + .max = 0x0000ffff, + .rcu_mask = RCU_APB1EN_TIMER2EN_Msk, + .bus = APB1, + .irqn = TIMER2_IRQn + }, +#if defined(CPU_MODEL_GD32VF103C8T6) || defined(CPU_MODEL_GD32VF103CBT6) || \ + defined(CPU_MODEL_GD32VF103R8T6) || defined(CPU_MODEL_GD32VF103RBT6) || \ + defined(CPU_MODEL_GD32VF103T8U6) || defined(CPU_MODEL_GD32VF103TBU6) || \ + defined(CPU_MODEL_GD32VF103V8T6) || defined(CPU_MODEL_GD32VF103VBT6) + { + .dev = TIMER3, + .max = 0x0000ffff, + .rcu_mask = RCU_APB1EN_TIMER3EN_Msk, + .bus = APB1, + .irqn = TIMER3_IRQn + }, + { + .dev = TIMER4, + .max = 0x0000ffff, + .rcu_mask = RCU_APB1EN_TIMER4EN_Msk, + .bus = APB1, + .irqn = TIMER4_IRQn + } +#endif +}; + +#define TIMER_0_IRQN TIMER1_IRQn +#define TIMER_1_IRQN TIMER2_IRQn +#define TIMER_2_IRQN TIMER3_IRQn +#define TIMER_3_IRQN TIMER4_IRQn + +#define TIMER_NUMOF ARRAY_SIZE(timer_config) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* CFG_TIMER_DEFAULT_H */ +/** @} */ diff --git a/boards/common/gd32v/include/cfg_uart_default.h b/boards/common/gd32v/include/cfg_uart_default.h new file mode 100644 index 0000000000..70ba87c68b --- /dev/null +++ b/boards/common/gd32v/include/cfg_uart_default.h @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2020 Koen Zandberg + * 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_gd32v + * @{ + * + * @file + * @brief Default UART configuration for GD32VF103 boards + * + * @author Koen Zandberg + * @author Gunar Schorcht + */ + +#ifndef CFG_UART_DEFAULT_H +#define CFG_UART_DEFAULT_H + +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { + .dev = USART0, + .rcu_mask = RCU_APB2EN_USART0EN_Msk, + .rx_pin = GPIO_PIN(PORT_A, 10), + .tx_pin = GPIO_PIN(PORT_A, 9), + .bus = APB2, + .irqn = USART0_IRQn, + }, +}; + +#define UART_0_IRQN USART0_IRQn + +#define UART_NUMOF ARRAY_SIZE(uart_config) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* CFG_UART_DEFAULT_H */ +/** @} */ diff --git a/boards/common/gd32v/include/periph_common_conf.h b/boards/common/gd32v/include/periph_common_conf.h new file mode 100644 index 0000000000..c455aa60dd --- /dev/null +++ b/boards/common/gd32v/include/periph_common_conf.h @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2020 Koen Zandberg + * 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_gd32v + * @{ + * + * @file + * @brief Common peripheral configuration for GD32VF103 boards + * + * @author Koen Zandberg + * @author Gunar Schorcht + */ + +#ifndef PERIPH_COMMON_CONF_H +#define PERIPH_COMMON_CONF_H + +#include "macros/units.h" +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define CLOCK_CORECLOCK MHZ(108) /**< CPU clock frequency in Hz */ + +#define CLOCK_AHB CLOCK_CORECLOCK /**< Equal to the CPU clock */ +#define CLOCK_APB1 CLOCK_AHB/2 /**< Half AHB clock */ +#define CLOCK_APB2 CLOCK_AHB /**< Equal to the AHB clock */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_COMMON_CONF_H */ +/** @} */ diff --git a/cpu/gd32v/Makefile.include b/cpu/gd32v/Makefile.include index 3b1ec4d9a3..a2f2252e24 100644 --- a/cpu/gd32v/Makefile.include +++ b/cpu/gd32v/Makefile.include @@ -6,4 +6,6 @@ ROM_LEN ?= 128K LINKER_SCRIPT ?= riscv.ld +CFLAGS += -DCPU_MODEL_$(call uppercase_and_underscore,$(CPU_MODEL)) + include $(RIOTCPU)/riscv_common/Makefile.include diff --git a/cpu/gd32v/clock.c b/cpu/gd32v/clock.c index 6624ddf377..c640138760 100644 --- a/cpu/gd32v/clock.c +++ b/cpu/gd32v/clock.c @@ -21,10 +21,6 @@ #include "cpu.h" #include "periph_conf.h" -#define CLOCK_AHB CLOCK_CORECLOCK /* Equal to the CPU clock */ -#define CLOCK_APB1 CLOCK_AHB/2 /* Half AHB clock */ -#define CLOCK_APB2 CLOCK_AHB /* Equal to the AHB clock */ - #define CLOCK_AHB_DIV 0 /* Max speed at 108 MHz */ #define CLOCK_APB1_DIV (0x04 | 0) /* Max speed at 54 MHz */ #define CLOCK_APB2_DIV (0x0 | 0) /* Max speed at 108 MHz */ diff --git a/dist/tools/doccheck/generic_exclude_patterns b/dist/tools/doccheck/generic_exclude_patterns index 1b74b8f441..d23b4fef22 100644 --- a/dist/tools/doccheck/generic_exclude_patterns +++ b/dist/tools/doccheck/generic_exclude_patterns @@ -41,9 +41,15 @@ warning: Member PULSE_COUNTER_SAUL_INFO \(macro definition\) of warning: Member SHT1X_PARAMS \(macro definition\) of warning: Member SHT1X_PARAM_[A-Z0-9_]* \(macro definition\) of warning: Member SHT1X_SAULINFO \(macro definition\) of +warning: Member TIMER_[0-9]_IRQN \(macro definition\) of +warning: Member TIMER_NUMOF \(macro definition\) of +warning: Member timer_config\[\] \(variable\) of warning: Member TMP00X_PARAM_ADDR \(macro definition\) of warning: Member TMP00X_PARAM_I2C \(macro definition\) of warning: Member TMP00X_PARAM_RATE \(macro definition\) of +warning: Member UART_[0-9]_IRQN \(macro definition\) of +warning: Member UART_NUMOF \(macro definition\) of +warning: Member uart_config\[\] \(variable\) of warning: Member XTIMER_BACKOFF \(macro definition\) of warning: Member XTIMER_CHAN \(macro definition\) of warning: Member XTIMER_DEV \(macro definition\) of From 400609f69b11c4e113c58a5787c11c4f494c0ade Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Thu, 19 Jan 2023 07:58:28 +0100 Subject: [PATCH 2/8] boards/seeedstudio-gd32: use common gd32v board definition --- boards/seeedstudio-gd32/Kconfig | 17 +----- boards/seeedstudio-gd32/Makefile.dep | 2 + boards/seeedstudio-gd32/Makefile.features | 3 +- boards/seeedstudio-gd32/Makefile.include | 11 +--- boards/seeedstudio-gd32/include/board.h | 10 ---- boards/seeedstudio-gd32/include/periph_conf.h | 60 +++---------------- 6 files changed, 15 insertions(+), 88 deletions(-) diff --git a/boards/seeedstudio-gd32/Kconfig b/boards/seeedstudio-gd32/Kconfig index 1b39d6bcdd..fdcb767a98 100644 --- a/boards/seeedstudio-gd32/Kconfig +++ b/boards/seeedstudio-gd32/Kconfig @@ -12,21 +12,10 @@ config BOARD_SEEEDSTUDIO_GD32 bool default y select CPU_MODEL_GD32VF103VBT6 - select HAS_PERIPH_UART select BOARD_HAS_HXTAL select BOARD_HAS_LXTAL + select HAS_PERIPH_TIMER + select HAS_PERIPH_UART select HAVE_SAUL_GPIO -config BOARD_HAS_HXTAL - bool - help - Indicates that the board is providing an HXTAL oscillator - -config BOARD_HAS_LXTAL - bool - help - Indicates that the board is providing an LXTAL oscillator - -config CLOCK_HXTAL - int - default 8000000 +source "$(RIOTBOARD)/common/gd32v/Kconfig" diff --git a/boards/seeedstudio-gd32/Makefile.dep b/boards/seeedstudio-gd32/Makefile.dep index 5472bf8b8d..a7dc06f36c 100644 --- a/boards/seeedstudio-gd32/Makefile.dep +++ b/boards/seeedstudio-gd32/Makefile.dep @@ -1,3 +1,5 @@ ifneq (,$(filter saul_default,$(USEMODULE))) USEMODULE += saul_gpio endif + +include $(RIOTBOARD)/common/gd32v/Makefile.dep diff --git a/boards/seeedstudio-gd32/Makefile.features b/boards/seeedstudio-gd32/Makefile.features index bef26d8676..bdb3d9dd6f 100644 --- a/boards/seeedstudio-gd32/Makefile.features +++ b/boards/seeedstudio-gd32/Makefile.features @@ -1,6 +1,7 @@ -CPU = gd32v CPU_MODEL = gd32vf103vbt6 # Put defined MCU peripherals here (in alphabetical order) FEATURES_PROVIDED += periph_timer FEATURES_PROVIDED += periph_uart + +include $(RIOTBOARD)/common/gd32v/Makefile.features diff --git a/boards/seeedstudio-gd32/Makefile.include b/boards/seeedstudio-gd32/Makefile.include index 8b4ff07a15..8df5985396 100644 --- a/boards/seeedstudio-gd32/Makefile.include +++ b/boards/seeedstudio-gd32/Makefile.include @@ -1,10 +1 @@ -# configure the serial interface -PORT_LINUX ?= /dev/ttyUSB0 -PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*))) - -# configure the flasher -PROGRAMMER ?= openocd -OPENOCD_DEBUG_ADAPTER ?= ftdi -OPENOCD_FTDI_ADAPTER ?= openocd-usb -OPENOCD_TRANSPORT = jtag -OPENOCD_RESET_USE_CONNECT_ASSERT_SRST = 1 +include $(RIOTBOARD)/common/gd32v/Makefile.include diff --git a/boards/seeedstudio-gd32/include/board.h b/boards/seeedstudio-gd32/include/board.h index 2fff9d3be3..ac87e0d25d 100644 --- a/boards/seeedstudio-gd32/include/board.h +++ b/boards/seeedstudio-gd32/include/board.h @@ -25,8 +25,6 @@ extern "C" { #endif -#include "macros/units.h" - /** * @name Button pin definitions * @{ @@ -67,14 +65,6 @@ extern "C" { #define LED_BLUE_PIN LED2_PIN /**< LED2 is blue */ /** @} */ -/** - * @name Xtimer configuration - * @{ - */ -#define XTIMER_HZ MHZ(1) -#define XTIMER_WIDTH (16) -/** @} */ - #ifdef __cplusplus } #endif diff --git a/boards/seeedstudio-gd32/include/periph_conf.h b/boards/seeedstudio-gd32/include/periph_conf.h index 677e77044e..49f1267d9b 100644 --- a/boards/seeedstudio-gd32/include/periph_conf.h +++ b/boards/seeedstudio-gd32/include/periph_conf.h @@ -19,15 +19,14 @@ #ifndef PERIPH_CONF_H #define PERIPH_CONF_H -#include "macros/units.h" #include "periph_cpu.h" +#include "periph_common_conf.h" -#ifdef __cplusplus -extern "C" { -#endif +#include "cfg_timer_default.h" +#include "cfg_uart_default.h" #ifndef CONFIG_BOARD_HAS_HXTAL -#define CONFIG_BOARD_HAS_HXTAL 1 /**< This board provides an high frequency oscillator */ +#define CONFIG_BOARD_HAS_HXTAL 1 /**< The board provides a high frequency oscillator. */ #endif #ifndef CONFIG_BOARD_HAS_LXTAL @@ -38,54 +37,9 @@ extern "C" { #define CONFIG_CLOCK_HXTAL MHZ(8) /**< HXTAL frequency */ #endif -#define CLOCK_CORECLOCK MHZ(108) /**< CPU clock frequency in Hz */ - -/** - * @name Timer configuration - * @{ - */ -static const timer_conf_t timer_config[] = { - { - .dev = TIMER2, - .max = 0x0000ffff, - .rcu_mask = RCU_APB1EN_TIMER2EN_Msk, - .bus = APB1, - .irqn = TIMER2_IRQn - }, - { - .dev = TIMER3, - .max = 0x0000ffff, - .rcu_mask = RCU_APB1EN_TIMER3EN_Msk, - .bus = APB1, - .irqn = TIMER3_IRQn - } -}; - -#define TIMER_0_IRQN TIMER2_IRQn -#define TIMER_1_IRQN TIMER3_IRQn - -#define TIMER_NUMOF ARRAY_SIZE(timer_config) -/** @} */ - -/** - * @name UART configuration - * @{ - */ -static const uart_conf_t uart_config[] = { - { - .dev = USART0, - .rcu_mask = RCU_APB2EN_USART0EN_Msk, - .rx_pin = GPIO_PIN(PORT_A, 10), - .tx_pin = GPIO_PIN(PORT_A, 9), - .bus = APB2, - .irqn = USART0_IRQn, - }, -}; - -#define UART_0_IRQN USART0_IRQn - -#define UART_NUMOF ARRAY_SIZE(uart_config) -/** @} */ +#ifdef __cplusplus +extern "C" { +#endif #ifdef __cplusplus } From 13e4ea4be1212c656bb7945dfe4f62628394d665 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Wed, 18 Jan 2023 13:10:00 +0100 Subject: [PATCH 3/8] boards/sipeed-longan-nano: initial support --- boards/sipeed-longan-nano/Kconfig | 21 ++++ boards/sipeed-longan-nano/Makefile | 3 + boards/sipeed-longan-nano/Makefile.dep | 5 + boards/sipeed-longan-nano/Makefile.features | 7 ++ boards/sipeed-longan-nano/Makefile.include | 1 + boards/sipeed-longan-nano/doc.txt | 105 ++++++++++++++++++ boards/sipeed-longan-nano/include/board.h | 59 ++++++++++ .../sipeed-longan-nano/include/gpio_params.h | 59 ++++++++++ .../sipeed-longan-nano/include/periph_conf.h | 49 ++++++++ cpu/gd32v/Kconfig | 7 ++ 10 files changed, 316 insertions(+) create mode 100644 boards/sipeed-longan-nano/Kconfig create mode 100644 boards/sipeed-longan-nano/Makefile create mode 100644 boards/sipeed-longan-nano/Makefile.dep create mode 100644 boards/sipeed-longan-nano/Makefile.features create mode 100644 boards/sipeed-longan-nano/Makefile.include create mode 100644 boards/sipeed-longan-nano/doc.txt create mode 100644 boards/sipeed-longan-nano/include/board.h create mode 100644 boards/sipeed-longan-nano/include/gpio_params.h create mode 100644 boards/sipeed-longan-nano/include/periph_conf.h diff --git a/boards/sipeed-longan-nano/Kconfig b/boards/sipeed-longan-nano/Kconfig new file mode 100644 index 0000000000..c316e937a4 --- /dev/null +++ b/boards/sipeed-longan-nano/Kconfig @@ -0,0 +1,21 @@ +# Copyright (c) 2023 Inria +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. +# + +config BOARD + default "sipeed-longan-nano" if BOARD_SIPEED_LONGAN_NANO + +config BOARD_SIPEED_LONGAN_NANO + bool + default y + select CPU_MODEL_GD32VF103CBT6 + select BOARD_HAS_HXTAL + select BOARD_HAS_LXTAL + select HAS_PERIPH_TIMER + select HAS_PERIPH_UART + select HAVE_SAUL_GPIO + +source "$(RIOTBOARD)/common/gd32v/Kconfig" diff --git a/boards/sipeed-longan-nano/Makefile b/boards/sipeed-longan-nano/Makefile new file mode 100644 index 0000000000..f8fcbb53a0 --- /dev/null +++ b/boards/sipeed-longan-nano/Makefile @@ -0,0 +1,3 @@ +MODULE = board + +include $(RIOTBASE)/Makefile.base diff --git a/boards/sipeed-longan-nano/Makefile.dep b/boards/sipeed-longan-nano/Makefile.dep new file mode 100644 index 0000000000..a7dc06f36c --- /dev/null +++ b/boards/sipeed-longan-nano/Makefile.dep @@ -0,0 +1,5 @@ +ifneq (,$(filter saul_default,$(USEMODULE))) + USEMODULE += saul_gpio +endif + +include $(RIOTBOARD)/common/gd32v/Makefile.dep diff --git a/boards/sipeed-longan-nano/Makefile.features b/boards/sipeed-longan-nano/Makefile.features new file mode 100644 index 0000000000..090ae88e5a --- /dev/null +++ b/boards/sipeed-longan-nano/Makefile.features @@ -0,0 +1,7 @@ +CPU_MODEL = gd32vf103cbt6 + +# Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart + +include $(RIOTBOARD)/common/gd32v/Makefile.features diff --git a/boards/sipeed-longan-nano/Makefile.include b/boards/sipeed-longan-nano/Makefile.include new file mode 100644 index 0000000000..8df5985396 --- /dev/null +++ b/boards/sipeed-longan-nano/Makefile.include @@ -0,0 +1 @@ +include $(RIOTBOARD)/common/gd32v/Makefile.include diff --git a/boards/sipeed-longan-nano/doc.txt b/boards/sipeed-longan-nano/doc.txt new file mode 100644 index 0000000000..3429ea56ab --- /dev/null +++ b/boards/sipeed-longan-nano/doc.txt @@ -0,0 +1,105 @@ +/** +@defgroup boards_sipeed_longan_nano Sipeed Longan Nano board +@ingroup boards +@brief Support for the Sipeed Longan Nano board +@author Gunar Schorcht + +## Overview + +The [Sipeed Longan Nano](https://longan.sipeed.com/en) is a +development board for the GigaDevice GD32VF103CBT6 MCU with the following +on-board components: + +- GD32VF103CBT6 RISC-V MCU @108MHz +- USB Type C +- TF card slot +- 3 user LEDs + +@image html "https://media-cdn.seeedstudio.com/media/catalog/product/cache/7f7f32ef807b8c2c2215b49801c56084/1/1/114992425_1.jpg" "Sipeed Longan Nano" width=600 + +## Hardware: + +| MCU | GD32VF103CBT6 | Supported | +|:----------- |:-------------------------------------- | --------- | +| Family | RISC-V with ECLIC | | +| Vendor | GigaDevice | | +| RAM | 32 kByte | | +| Flash | 128 KByte | | +| Frequency | 108 MHz | | +| Power Modes | 3 (Sleep, Deep Sleep, Standby) | no | +| GPIOs | 37 | yes | +| Timers | 5 x 16-bit timer | yes | +| RTC | 1 x 32-bit counter, 20-bit prescaler | yes | +| WDT | 2 x 12-bit counter, 3-bit prescaler | yes | +| ADC | 2 x 12-bit units, 16 channels, 1 Msps | no | +| DAC | 2 x 12-bit channel | no | +| UART | - | yes | +| USART | 3 | yes | +| SPI | 3 | no | +| I2C | 2 x Fast Mode 400 kHz | no | +| I2S | 2 | no | +| CAN | 2 x CAN 2.0B with up to 1 Mbps | no | +| PWM | 6 Channels | no | +| USB | 1 x USB FS OTG | no | +| Vcc | 3.0V - 3.6V | | +| Datasheet | [Datasheet](https://gd32mcu.com/data/documents/datasheet/GD32VF103_Datasheet_Rev1.6.pdf) | | +| Reference Manual | [Reference Manual](https://gd32mcu.com/download/down/document_id/222/path_type/1) | | +| Board Manual | [Board Manual](https://longan.sipeed.com/en/) | | +| Board Schematic | [Board Schematic](http://dl.sipeed.com/fileList/LONGAN/Nano/HDK/Longan%20Nano%203302/2_Schematic/Longan_nano_3302_Schematic.pdf) | | + +## Pin Layout / Configuration + +The general pin layout is shown below. + +@image html "https://longan.sipeed.com/assets/longan_nano_pinout_v1.1.0_w5676_h4000_large.png" "Sipeed Longan Nano Pinout" width=800 + +The following table shows the connection of the on-board components with the +MCU pins and their configuration in RIOT. + +| MCU Pin | MCU Peripheral | RIOT Peripheral | Board Function | +|:--------|:---------------|:--------------------|:----------------------| +| PA9 | USART0 TX | UART_DEV(0) TX | UART TX | +| PA10 | USART0 RX | UART_DEV(0) RX | UART RX | +| PB0 | | | LED1 | +| PB1 | | | LED2 | +| PB5 | | | LED0 | + +## Flash the board + +The board is flashed via a JTAG interface with OpenOCD (at least [release version 0.12.0] +(https://github.com/openocd-org/openocd/tree/9ea7f3d647c8ecf6b0f1424002dfc3f4504a162c)). +By default, an FTDI adapter according to the configuration defined in +[`interface/openocd-usb.cfg`] +(https://github.com/openocd-org/openocd/blob/9ea7f3d647c8ecf6b0f1424002dfc3f4504a162c/tcl/interface/ftdi/openocd-usb.cfg) +is assumed. +``` +BOARD=seeedstudio-gd32 make -C examples/hello-world flash +``` +To use an FTDI adapter with a different configuration, the configuration can be +defined using the variable `OPENOCD_FTDI_ADAPTER`, for example: +``` +OPENOCD_FTDI_ADAPTER=tigar BOARD=seeedstudio-gd32 make -C examples/hello-world flash +``` +If another adapter is used, it can be specified using variable +`OPENOCD_DEBUG_ADAPTER`, for example for a Segger J-Link adapter: +``` +OPENOCD_DEBUG_ADAPTER=jlink BOARD=seeedstudio-gd32 make -C examples/hello-world flash +``` + +## Accessing STDIO via UART + +The `stdio` is directly accessible through the first UART interface. If an +external USB-to-UART interface is used, this interface is mapped to +`/dev/ttyUSB` on a Linux host, where `` is the index of the UART +interface, which is 0 by default. + +Use the `term` target to connect to the board using `/dev/ttyUSB0`: +``` +BOARD=seeedstudio-gd32 make -C examples/hello-world term +``` +If the UART interface index of board's USB to UART bridge is not 0, use +the following command to connect: +``` +BOARD=seeedstudio-gd32 make -C examples/hello-world term PORT=/dev/ttyUSB +``` + */ diff --git a/boards/sipeed-longan-nano/include/board.h b/boards/sipeed-longan-nano/include/board.h new file mode 100644 index 0000000000..ee61783002 --- /dev/null +++ b/boards/sipeed-longan-nano/include/board.h @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_sipeed_longan_nano + * @{ + * + * @file + * @brief Board specific definitions for the Sipeed Longan Nano board + * + * @author Koen Zandberg + * @author Gunar Schorcht + */ + +#ifndef BOARD_H +#define BOARD_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name LED (on-board) configuration + * @{ + */ +#define LED0_PIN GPIO_PIN(PORT_C, 13) +#define LED0_MASK (1 << 13) +#define LED0_ON (GPIOC->BC = LED0_MASK) +#define LED0_OFF (GPIOC->BOP = LED0_MASK) +#define LED0_TOGGLE (GPIOC->OCTL ^= LED0_MASK) + +#define LED1_PIN GPIO_PIN(PORT_A, 1) +#define LED1_MASK (1 << 1) +#define LED1_ON (GPIOA->BC = LED1_MASK) +#define LED1_OFF (GPIOA->BOP = LED1_MASK) +#define LED1_TOGGLE (GPIOA->OCTL ^= LED1_MASK) + +#define LED2_PIN GPIO_PIN(PORT_A, 2) +#define LED2_MASK (1 << 2) +#define LED2_ON (GPIOA->BC = LED2_MASK) +#define LED2_OFF (GPIOA->BOP = LED2_MASK) +#define LED2_TOGGLE (GPIOA->OCTL ^= LED2_MASK) + +#define LED_RED_PIN LED0_PIN /**< LED0 is red */ +#define LED_GREEN_PIN LED1_PIN /**< LED1 is green */ +#define LED_BLUE_PIN LED2_PIN /**< LED2 is blue */ +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H */ +/** @} */ diff --git a/boards/sipeed-longan-nano/include/gpio_params.h b/boards/sipeed-longan-nano/include/gpio_params.h new file mode 100644 index 0000000000..9925466fb0 --- /dev/null +++ b/boards/sipeed-longan-nano/include/gpio_params.h @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2020 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_sipeed_longan_nano + * @{ + * + * @file + * @brief Configuration of SAUL mapped GPIO pins + * + * @author Gunar Schorcht + */ + +#ifndef GPIO_PARAMS_H +#define GPIO_PARAMS_H + +#include "board.h" +#include "saul/periph.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief LED/Button SAUL configuration + */ +static const saul_gpio_params_t saul_gpio_params[] = +{ + { + .name = "LED RED", + .pin = LED0_PIN, + .mode = GPIO_OUT, + .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR), + }, + { + .name = "LED GREEN", + .pin = LED1_PIN, + .mode = GPIO_OUT, + .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR), + }, + { + .name = "LED BLUE", + .pin = LED2_PIN, + .mode = GPIO_OUT, + .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR), + }, +}; + +#ifdef __cplusplus +} +#endif + +#endif /* GPIO_PARAMS_H */ +/** @} */ diff --git a/boards/sipeed-longan-nano/include/periph_conf.h b/boards/sipeed-longan-nano/include/periph_conf.h new file mode 100644 index 0000000000..7c0a616c38 --- /dev/null +++ b/boards/sipeed-longan-nano/include/periph_conf.h @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_sipeed_longan_nano + * @{ + * + * @file + * @brief Board specific definitions for the SeeedStudio GD32 RISC-V board + * + * @author Gunar Schorcht + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +#include "periph_cpu.h" +#include "periph_common_conf.h" + +#include "cfg_timer_default.h" +#include "cfg_uart_default.h" + +#ifndef CONFIG_BOARD_HAS_HXTAL +#define CONFIG_BOARD_HAS_HXTAL 1 /**< The board provides a high frequency oscillator. */ +#endif + +#ifndef CONFIG_BOARD_HAS_LXTAL +#define CONFIG_BOARD_HAS_LXTAL 1 /**< The board provides a low frequency oscillator. */ +#endif + +#ifndef CONFIG_CLOCK_HXTAL +#define CONFIG_CLOCK_HXTAL MHZ(8) /**< HXTAL frequency */ +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ +/** @} */ diff --git a/cpu/gd32v/Kconfig b/cpu/gd32v/Kconfig index ec50dd6ccd..77fd0b4a08 100644 --- a/cpu/gd32v/Kconfig +++ b/cpu/gd32v/Kconfig @@ -23,6 +23,10 @@ config CPU_FAM_GD32V select MODULE_PERIPH_CLIC if TEST_KCONFIG select MODULE_PERIPH_WDT if MODULE_PERIPH_PM && HAS_PERIPH_WDT +config CPU_MODEL_GD32VF103CBT6 + bool + select CPU_FAM_GD32V + config CPU_MODEL_GD32VF103VBT6 bool select CPU_FAM_GD32V @@ -36,6 +40,9 @@ config HAS_CPU_GD32V config CPU_FAM default "gd32v" if CPU_FAM_GD32V +config CPU_MODEL + default "gd32vf103cbt6" if CPU_MODEL_GD32VF103CBT6 + config CPU_MODEL default "gd32vf103vbt6" if CPU_MODEL_GD32VF103VBT6 From 2dfe3850c2f201267cc49c8266e80511cafe2ebc Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Tue, 24 Jan 2023 00:39:43 +0100 Subject: [PATCH 4/8] examples: add sipeed-longan-nano to Makefile.ci --- examples/dtls-wolfssl/Makefile.ci | 1 + examples/javascript/Makefile.ci | 1 + 2 files changed, 2 insertions(+) diff --git a/examples/dtls-wolfssl/Makefile.ci b/examples/dtls-wolfssl/Makefile.ci index 4a58efb160..1709b4b467 100644 --- a/examples/dtls-wolfssl/Makefile.ci +++ b/examples/dtls-wolfssl/Makefile.ci @@ -32,6 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := \ saml10-xpro \ saml11-xpro \ seeedstudio-gd32 \ + sipeed-longan-nano \ slstk3400a \ spark-core \ stk3200 \ diff --git a/examples/javascript/Makefile.ci b/examples/javascript/Makefile.ci index c39c12c5f6..c3e5eb4535 100644 --- a/examples/javascript/Makefile.ci +++ b/examples/javascript/Makefile.ci @@ -47,6 +47,7 @@ BOARD_INSUFFICIENT_MEMORY := \ saml10-xpro \ saml11-xpro \ seeedstudio-gd32 \ + sipeed-longan-nano \ slstk3400a \ spark-core \ stk3200 \ From 42ec4f04eb14622fc06059e84a0e2d8284e583b5 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Tue, 24 Jan 2023 00:39:55 +0100 Subject: [PATCH 5/8] tests: add sipeed-longan-nano to Makefile.ci --- tests/pkg_utensor/Makefile.ci | 1 + tests/unittests/Makefile.ci | 1 + 2 files changed, 2 insertions(+) diff --git a/tests/pkg_utensor/Makefile.ci b/tests/pkg_utensor/Makefile.ci index f7c59982f3..eb51aa3832 100644 --- a/tests/pkg_utensor/Makefile.ci +++ b/tests/pkg_utensor/Makefile.ci @@ -37,6 +37,7 @@ BOARD_INSUFFICIENT_MEMORY := \ saml10-xpro \ saml11-xpro \ seeedstudio-gd32 \ + sipeed-longan-nano \ slstk3400a \ spark-core \ stk3200 \ diff --git a/tests/unittests/Makefile.ci b/tests/unittests/Makefile.ci index 56a8226876..716b28ffdd 100644 --- a/tests/unittests/Makefile.ci +++ b/tests/unittests/Makefile.ci @@ -97,6 +97,7 @@ BOARD_INSUFFICIENT_MEMORY := \ samr30-xpro \ samr34-xpro \ seeedstudio-gd32 \ + sipeed-longan-nano \ sensebox_samd21 \ slstk3400a \ slstk3401a \ From 2b1506d6d4900b5c7d61d082b2c349e32ce5ebeb Mon Sep 17 00:00:00 2001 From: Flole998 Date: Tue, 24 Jan 2023 00:15:17 +0000 Subject: [PATCH 6/8] pkg/wolfssl: Fix memory leaks in wolfSSL sock_tls --- pkg/wolfssl/sock_tls/sock_tls.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/pkg/wolfssl/sock_tls/sock_tls.c b/pkg/wolfssl/sock_tls/sock_tls.c index 395e55e569..37bcbaf754 100644 --- a/pkg/wolfssl/sock_tls/sock_tls.c +++ b/pkg/wolfssl/sock_tls/sock_tls.c @@ -65,7 +65,7 @@ static int tls_session_create(sock_tls_t *sk) static void tls_session_destroy(sock_tls_t *sk) { - if (!sk || sk->ssl) + if (!sk || !sk->ssl) return; wolfSSL_free(sk->ssl); } From bb0efa89d1f9e139ae08222dce59d7f514960fad Mon Sep 17 00:00:00 2001 From: MrKevinWeiss Date: Tue, 24 Jan 2023 10:19:46 +0100 Subject: [PATCH 7/8] drivers/sx126x: Fix kconfig modeling --- drivers/sx126x/Kconfig | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/sx126x/Kconfig b/drivers/sx126x/Kconfig index 1b10769836..7db07db571 100644 --- a/drivers/sx126x/Kconfig +++ b/drivers/sx126x/Kconfig @@ -16,12 +16,14 @@ menuconfig MODULE_SX126X select MODULE_IOLIST select MODULE_NETDEV_LEGACY_API select MODULE_PERIPH_GPIO + select MODULE_PERIPH_GPIO_IRQ select MODULE_PERIPH_SPI select PACKAGE_DRIVER_SX126X +if MODULE_SX126X + choice bool "Radio variant" - depends on MODULE_SX126X default MODULE_SX1261 if HAVE_SX1261 default MODULE_SX1262 if HAVE_SX1262 default MODULE_SX1268 if HAVE_SX1268 @@ -30,25 +32,30 @@ choice config MODULE_SX1261 bool "SX1261" - select MODULE_PERIPH_GPIO_IRQ config MODULE_SX1262 bool "SX1262" - select MODULE_PERIPH_GPIO_IRQ config MODULE_SX1268 bool "SX1268" - select MODULE_PERIPH_GPIO_IRQ config MODULE_LLCC68 bool "LLCC68" - select MODULE_PERIPH_GPIO_IRQ config MODULE_SX126X_STM32WL bool "SX126X-STM32WL" endchoice +config MODULE_SX126X_RF_SWITCH + bool "Enable RF switch support" + default y if HAVE_SX126X_RF_SWITCH + depends on MODULE_SX126X + depends on HAS_PERIPH_GPIO + select MODULE_PERIPH_GPIO + +endif # MODULE_SX126X + config HAVE_SX1261 bool select HAVE_SX126X @@ -83,3 +90,8 @@ config HAVE_SX126X bool help Indicates that an sx126x transceiver is present. + +config HAVE_SX126X_RF_SWITCH + bool + help + Indicates that an sx126x rf switch pin is wired. From 75ece645816adf16705f8419526f4d2a86d9b4fe Mon Sep 17 00:00:00 2001 From: MrKevinWeiss Date: Tue, 24 Jan 2023 10:20:42 +0100 Subject: [PATCH 8/8] boards/nucleo-wl55jc: Expose sx126x in kconfig --- boards/nucleo-wl55jc/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/boards/nucleo-wl55jc/Kconfig b/boards/nucleo-wl55jc/Kconfig index cc7ba27881..e3f8241b9f 100644 --- a/boards/nucleo-wl55jc/Kconfig +++ b/boards/nucleo-wl55jc/Kconfig @@ -25,6 +25,9 @@ config BOARD_NUCLEO_WL55JC # Put other features for this board (in alphabetical order) select HAS_ARDUINO select HAS_RIOTBOOT + select HAS_PERIPH_GPIO_IRQ + select HAVE_SX126X_STM32WL + select HAVE_SX126X_RF_SWITCH select MODULE_PERIPH_LPUART if MODULE_STDIO_UART && HAS_PERIPH_LPUART