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cpu/riscv_common: model Kconfig
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@ -12,9 +12,11 @@ config CPU_ARCH_RISCV
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select HAS_NEWLIB
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select HAS_PERIPH_CORETIMER
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select HAS_PICOLIBC if '$(RIOT_CI_BUILD)' != '1'
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select MODULE_MALLOC_THREAD_SAFE if TEST_KCONFIG
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select HAS_SSP
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select MODULE_MALLOC_THREAD_SAFE if TEST_KCONFIG
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imply MODULE_NEWLIB_NANO
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config CPU_CORE_RV32IMAC
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bool
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select CPU_ARCH_RISCV
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@ -28,3 +30,17 @@ config HAS_ARCH_RISCV
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config CPU_ARCH
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default "rv32" if CPU_CORE_RV32IMAC
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config MODULE_RISCV_COMMON
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bool
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default y
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depends on TEST_KCONFIG && CPU_ARCH_RISCV
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select MODULE_MALLOC_THREAD_SAFE
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help
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Common code for RISC-V architecture.
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rsource "periph/Kconfig"
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choice LIBC_IMPLEMENTATION
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default MODULE_NEWLIB
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endchoice
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35
cpu/riscv_common/periph/Kconfig
Normal file
35
cpu/riscv_common/periph/Kconfig
Normal file
@ -0,0 +1,35 @@
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# Copyright (c) 2021 HAW Hamburg
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#
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# This file is subject to the terms and conditions of the GNU Lesser
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# General Public License v2.1. See the file LICENSE in the top level
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# directory for more details.
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#
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config MODULE_RISCV_COMMON_PERIPH
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bool
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default y
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depends on TEST_KCONFIG && CPU_ARCH_RISCV
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help
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Common peripheral code for RISC-V architecture.
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if MODULE_RISCV_COMMON_PERIPH
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config MODULE_PERIPH_CLIC
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bool
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depends on HAS_PERIPH_CLIC
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help
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Core-Local interrupt controller driver.
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config MODULE_PERIPH_CORETIMER
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bool
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depends on HAS_PERIPH_CORETIMER
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help
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Low-level timer driver based on the Core-local Interrupt (CLINT)
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config MODULE_PERIPH_PLIC
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bool
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depends on HAS_PERIPH_PLIC
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help
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Platform-Level interrupt controller driver.
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endif # MODULE_RISCV_COMMON_PERIPH
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@ -15,6 +15,9 @@ ifneq (,$(filter periph_init, $(USEMODULE)))
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periph_init% \
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periph_common \
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periph_rtc_rtt \
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periph_clic \
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periph_coretimer \
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periph_plic
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#
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PERIPH_MODULES := $(filter-out $(PERIPH_IGNORE_MODULES),\
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$(filter periph_%,$(USEMODULE)))
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