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Merge pull request #13861 from maribu/nucleo-f767-spi

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boards/nucleo-f767zi: Fix SPI config
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Alexandre Abadie 2020-05-19 21:00:11 +02:00 committed by GitHub
commit cf6ab10abc
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5
boards/nucleo-f767zi/Makefile
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@ -2,3 +2,8 @@ MODULE = board
DIRS = $(RIOTBOARD)/common/nucleo
include $(RIOTBASE)/Makefile.base
ifneq (,$(filter stm32_eth,$(USEMODULE)))
$(info Remapping MOSI of SPI_DEV(0) from PA7 to PB5 to solve pin conflict.\
(PA7 is also connected to the RMII_DV of the Ethernet Phy.))
endif

9
boards/nucleo-f767zi/include/periph_conf.h
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@ -118,7 +118,16 @@ static const uart_conf_t uart_config[] = {
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,
/* PA7 is the default MOSI pin, as it is required for compatibility with
* Arduino(ish) shields. Sadly, it is also connected to the RMII_DV of
* Ethernet PHY. We work around this by remapping the MOSI to PB5 when
* the on-board Ethernet PHY is used.
*/
#ifdef MODULE_PERIPH_ETH
.mosi_pin = GPIO_PIN(PORT_B, 5),
#else
.mosi_pin = GPIO_PIN(PORT_A, 7),
#endif
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,