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cpu/stm32f1: cleanup interrupt vectors definitions
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@ -40,7 +40,11 @@ extern "C" {
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* @{
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*/
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#define CPU_DEFAULT_IRQ_PRIO (1U)
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#if defined(CPU_MODEL_STM32F103RE)
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#define CPU_IRQ_NUMOF (60U)
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#else
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#define CPU_IRQ_NUMOF (43U)
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#endif
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#define CPU_FLASH_BASE FLASH_BASE
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/** @} */
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@ -97,81 +97,83 @@ ISR_VECTORS const void *interrupt_vector[] = {
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(void*) (&_estack), /* pointer to the top of the stack */
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/* Cortex-M3 handlers */
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(void*) reset_handler_default, /* entry point of the program */
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(void*) nmi_default, /* non maskable interrupt handler */
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(void*) hard_fault_default, /* hard fault exception */
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(void*) mem_manage_default, /* memory manage exception */
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(void*) bus_fault_default, /* bus fault exception */
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(void*) usage_fault_default, /* usage fault exception */
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(void*) (0UL), /* Reserved */
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(void*) (0UL), /* Reserved */
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(void*) (0UL), /* Reserved */
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(void*) (0UL), /* Reserved */
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(void*) isr_svc, /* system call interrupt, in RIOT used for
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* switching into thread context on boot */
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(void*) debug_mon_default, /* debug monitor exception */
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(void*) (0UL), /* Reserved */
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(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
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* context switching is happening here */
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(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
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(void*) nmi_default, /* [-14] non maskable interrupt handler */
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(void*) hard_fault_default, /* [-13] hard fault exception */
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(void*) mem_manage_default, /* [-12] memory manage exception */
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(void*) bus_fault_default, /* [-11] bus fault exception */
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(void*) usage_fault_default, /* [-10] usage fault exception */
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(void*) (0UL), /* [-9] Reserved */
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(void*) (0UL), /* [-8] Reserved */
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(void*) (0UL), /* [-7] Reserved */
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(void*) (0UL), /* [-6] Reserved */
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(void*) isr_svc, /* [-5] system call interrupt, in RIOT used for
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switching into thread context on boot */
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(void*) debug_mon_default, /* [-4] debug monitor exception */
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(void*) (0UL), /* [-3] Reserved */
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(void*) isr_pendsv, /* [-2] pendSV interrupt, in RIOT the actual
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context switching is happening here */
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(void*) isr_systick, /* [-1] SysTick interrupt, not used in RIOT */
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/* STM specific peripheral handlers */
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(void*) isr_wwdg,
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(void*) isr_pvd,
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(void*) isr_tamper,
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(void*) isr_rtc,
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(void*) isr_flash,
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(void*) isr_rcc,
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(void*) isr_exti,
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(void*) isr_exti,
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(void*) isr_exti,
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(void*) isr_exti,
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(void*) isr_exti,
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(void*) isr_dma1_ch1,
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(void*) isr_dma1_ch2,
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(void*) isr_dma1_ch3,
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(void*) isr_dma1_ch4,
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(void*) isr_dma1_ch5,
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(void*) isr_dma1_ch6,
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(void*) isr_dma1_ch7,
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(void*) isr_adc1_2,
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(void*) isr_usb_hp_can1_tx,
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(void*) isr_usb_lp_can1_rx0,
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(void*) isr_can1_rx1,
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(void*) isr_can1_sce,
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(void*) isr_exti,
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(void*) isr_tim1_brk,
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(void*) isr_tim1_up,
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(void*) isr_tim1_trg_com,
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(void*) isr_tim1_cc,
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(void*) isr_tim2,
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(void*) isr_tim3,
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(void*) isr_tim4,
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(void*) isr_i2c1_ev,
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(void*) isr_i2c1_er,
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(void*) isr_i2c2_ev,
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(void*) isr_i2c2_er,
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(void*) isr_spi1,
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(void*) isr_spi2,
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(void*) isr_usart1,
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(void*) isr_usart2,
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(void*) isr_usart3,
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(void*) isr_exti,
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(void*) isr_rtc_alarm,
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(void*) isr_usb_wakeup,
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(void*) isr_tim8_brk,
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(void*) isr_tim8_up,
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(void*) isr_tim8_trg_com,
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(void*) isr_tim8_cc,
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(void*) isr_adc3,
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(void*) isr_fsmc,
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(void*) isr_sdio,
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(void*) isr_tim5,
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(void*) isr_spi3,
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(void*) isr_uart4,
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(void*) isr_uart5,
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(void*) isr_tim6,
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(void*) isr_tim7,
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(void*) isr_dma2_ch1,
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(void*) isr_dma2_ch2,
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(void*) isr_dma2_ch3,
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(void*) isr_dma2_ch4_5,
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(void*) isr_wwdg, /* [0] Window WatchDog Interrupt */
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(void*) isr_pvd, /* [1] PVD through EXTI Line detection Interrupt */
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(void*) isr_tamper, /* [2] Tamper Interrupt */
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(void*) isr_rtc, /* [3] RTC global Interrupt */
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(void*) isr_flash, /* [4] FLASH global Interrupt */
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(void*) isr_rcc, /* [5] RCC global Interrupt */
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(void*) isr_exti, /* [6] EXTI Line0 Interrupt */
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(void*) isr_exti, /* [7] EXTI Line1 Interrupt */
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(void*) isr_exti, /* [8] EXTI Line2 Interrupt */
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(void*) isr_exti, /* [9] EXTI Line3 Interrupt */
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(void*) isr_exti, /* [10] EXTI Line4 Interrupt */
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(void*) isr_dma1_ch1, /* [11] DMA1 Channel 1 global Interrupt */
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(void*) isr_dma1_ch2, /* [12] DMA1 Channel 2 global Interrupt */
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(void*) isr_dma1_ch3, /* [13] DMA1 Channel 3 global Interrupt */
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(void*) isr_dma1_ch4, /* [14] DMA1 Channel 4 global Interrupt */
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(void*) isr_dma1_ch5, /* [15] DMA1 Channel 5 global Interrupt */
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(void*) isr_dma1_ch6, /* [16] DMA1 Channel 6 global Interrupt */
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(void*) isr_dma1_ch7, /* [17] DMA1 Channel 7 global Interrupt */
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(void*) isr_adc1_2, /* [18] ADC1 and ADC2 global Interrupt */
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(void*) isr_usb_hp_can1_tx, /* [19] USB Device High Priority or CAN1 TX Interrupts */
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(void*) isr_usb_lp_can1_rx0, /* [20] USB Device Low Priority or CAN1 RX0 Interrupts */
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(void*) isr_can1_rx1, /* [21] CAN1 RX1 Interrupt */
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(void*) isr_can1_sce, /* [22] CAN1 SCE Interrupt */
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(void*) isr_exti, /* [23] External Line[9:5] Interrupts */
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(void*) isr_tim1_brk, /* [24] TIM1 Break Interrupt */
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(void*) isr_tim1_up, /* [25] TIM1 Update Interrupt */
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(void*) isr_tim1_trg_com, /* [26] TIM1 Trigger and Commutation Interrupt */
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(void*) isr_tim1_cc, /* [27] TIM1 Capture Compare Interrupt */
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(void*) isr_tim2, /* [28] TIM2 global Interrupt */
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(void*) isr_tim3, /* [29] TIM3 global Interrupt */
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(void*) isr_tim4, /* [30] TIM4 global Interrupt */
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(void*) isr_i2c1_ev, /* [31] I2C1 Event Interrupt */
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(void*) isr_i2c1_er, /* [32] I2C1 Error Interrupt */
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(void*) isr_i2c2_ev, /* [33] I2C2 Event Interrupt */
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(void*) isr_i2c2_er, /* [34] I2C2 Error Interrupt */
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(void*) isr_spi1, /* [35] SPI1 global Interrupt */
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(void*) isr_spi2, /* [36] SPI2 global Interrupt */
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(void*) isr_usart1, /* [37] USART1 global Interrupt */
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(void*) isr_usart2, /* [38] USART2 global Interrupt */
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(void*) isr_usart3, /* [39] USART3 global Interrupt */
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(void*) isr_exti, /* [40] External Line[15:10] Interrupts */
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(void*) isr_rtc_alarm, /* [41] RTC Alarm through EXTI Line Interrupt */
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(void*) isr_usb_wakeup, /* [42] USB Device WakeUp from suspend through EXTI Line Interrupt */
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#if defined(CPU_MODEL_STM32F103RE)
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(void*) isr_tim8_brk, /* [43] TIM8 Break Interrupt */
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(void*) isr_tim8_up, /* [44] TIM8 Update Interrupt */
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(void*) isr_tim8_trg_com, /* [45] TIM8 Trigger and Commutation Interrupt */
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(void*) isr_tim8_cc, /* [46] TIM8 Capture Compare Interrupt */
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(void*) isr_adc3, /* [47] ADC3 global Interrupt */
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(void*) isr_fsmc, /* [48] FSMC global Interrupt */
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(void*) isr_sdio, /* [49] SDIO global Interrupt */
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(void*) isr_tim5, /* [50] TIM5 global Interrupt */
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(void*) isr_spi3, /* [51] SPI3 global Interrupt */
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(void*) isr_uart4, /* [52] UART4 global Interrupt */
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(void*) isr_uart5, /* [53] UART5 global Interrupt */
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(void*) isr_tim6, /* [54] TIM6 global Interrupt */
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(void*) isr_tim7, /* [55] TIM7 global Interrupt */
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(void*) isr_dma2_ch1, /* [56] DMA2 Channel 1 global Interrupt */
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(void*) isr_dma2_ch2, /* [57] DMA2 Channel 2 global Interrupt */
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(void*) isr_dma2_ch3, /* [58] DMA2 Channel 3 global Interrupt */
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(void*) isr_dma2_ch4_5, /* [59] DMA2 Channel 4 and Channel 5 global Interrupt */
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#endif
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};
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