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boards/nucleo-l1: adapted UART configuration

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Hauke Petersen 2015-09-15 16:20:49 +02:00 committed by Thomas Eichinger
parent 2e84fbf85e
commit cdcdd185af
3 changed files with 3 additions and 7 deletions
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8
boards/nucleo-l1/include/periph_conf.h
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@ -72,11 +72,9 @@ static const timer_conf_t timer_config[] = {
#define UART_0_ISR isr_usart2 #define UART_0_ISR isr_usart2
#define UART_0_BUS_FREQ 32000000 #define UART_0_BUS_FREQ 32000000
/* UART 0 pin configuration */ /* UART 0 pin configuration */
#define UART_0_PORT GPIOA #define UART_0_RX_PIN GPIO(PORT_A, 3)
#define UART_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN) #define UART_0_TX_PIN GPIO(PORT_A, 2)
#define UART_0_RX_PIN 3 #define UART_0_AF GPIO_AF7
#define UART_0_TX_PIN 2
#define UART_0_AF 7
/** /**
* @brief GPIO configuration * @brief GPIO configuration

1
cpu/stm32l1/include/periph_cpu.h
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@ -81,7 +81,6 @@ typedef enum {
} gpio_af_t; } gpio_af_t;
/** /**
* @brief Configure the alternate function for the given pin * @brief Configure the alternate function for the given pin
* *
* @note This is meant for internal use in STM32L1 peripheral drivers only * @note This is meant for internal use in STM32L1 peripheral drivers only

1
cpu/stm32l1/periph/uart.c
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@ -99,7 +99,6 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
gpio_t rx_pin = 0; gpio_t rx_pin = 0;
gpio_af_t af = 0; gpio_af_t af = 0;
float clk = 0; float clk = 0;
float divider;
uint16_t mantissa; uint16_t mantissa;
uint8_t fraction; uint8_t fraction;