diff --git a/cpu/nrf51822/include/cpu-conf.h b/cpu/nrf51822/include/cpu-conf.h index 939fe028b2..8a5accd9b8 100644 --- a/cpu/nrf51822/include/cpu-conf.h +++ b/cpu/nrf51822/include/cpu-conf.h @@ -29,10 +29,10 @@ * TODO: measure and adjust for the cortex-m0 * @{ */ -#define KERNEL_CONF_STACKSIZE_PRINTF (1024) +#define KERNEL_CONF_STACKSIZE_PRINTF (524) #ifndef KERNEL_CONF_STACKSIZE_DEFAULT -#define KERNEL_CONF_STACKSIZE_DEFAULT (1024) +#define KERNEL_CONF_STACKSIZE_DEFAULT (524) #endif #define KERNEL_CONF_STACKSIZE_IDLE (256) diff --git a/cpu/nrf51822/nrf51822qfaa_linkerscript.ld b/cpu/nrf51822/nrf51822qfaa_linkerscript.ld index c89f2fe043..d1358af19c 100644 --- a/cpu/nrf51822/nrf51822qfaa_linkerscript.ld +++ b/cpu/nrf51822/nrf51822qfaa_linkerscript.ld @@ -34,8 +34,8 @@ SEARCH_DIR(.) /* Memory Spaces Definitions */ MEMORY { - rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x40000 /* 256K flash */ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x4000 /* 16K ram */ + rom (rx) : ORIGIN = 0x00000000, LENGTH = 256K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K } /* The stack size used by the application. NOTE: you need to adjust */ diff --git a/cpu/nrf51822/periph/timer.c b/cpu/nrf51822/periph/timer.c index ffafbb4681..c68f02b2c2 100644 --- a/cpu/nrf51822/periph/timer.c +++ b/cpu/nrf51822/periph/timer.c @@ -43,14 +43,14 @@ static timer_conf_t timer_config[TIMER_NUMOF]; int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int)) { - NRF_TIMER_Type *timer; switch (dev) { #if TIMER_0_EN case TIMER_0: timer = TIMER_0_DEV; - timer->BITMODE = TIMER_BITMODE_BITMODE_32Bit; /* 32 Bit Mode */ + timer->POWER = 1; + timer->BITMODE = TIMER_0_BITMODE; NVIC_SetPriority(TIMER_0_IRQ, TIMER_IRQ_PRIO); NVIC_EnableIRQ(TIMER_0_IRQ); break; @@ -58,7 +58,8 @@ int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int)) #if TIMER_1_EN case TIMER_1: timer = TIMER_1_DEV; - timer->BITMODE = TIMER_BITMODE_BITMODE_16Bit; /* 16 Bit Mode */ + timer->POWER = 1; + timer->BITMODE = TIEMR_1_BITMODE; NVIC_SetPriority(TIMER_1_IRQ, TIMER_IRQ_PRIO); NVIC_EnableIRQ(TIMER_1_IRQ); break; @@ -66,7 +67,8 @@ int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int)) #if TIMER_2_EN case TIMER_2: timer = TIMER_2_DEV; - timer->BITMODE = TIMER_BITMODE_BITMODE_16Bit; /* 16 Bit Mode */ + timer->POWER = 1; + timer->BITMODE = TIMER_2_BITMODE; NVIC_SetPriority(TIMER_2_IRQ, TIMER_IRQ_PRIO); NVIC_EnableIRQ(TIMER_2_IRQ); break; @@ -102,14 +104,17 @@ int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int)) default: return -1; } - /* timer->INTENSET = TIMER_INTENSET_COMPARE0_Enabled << TIMER_INTENSET_COMPARE0_Pos; */ + + /* clear all compare channels */ timer->SHORTS = (TIMER_SHORTS_COMPARE0_CLEAR_Enabled << TIMER_SHORTS_COMPARE0_CLEAR_Pos); timer->SHORTS = (TIMER_SHORTS_COMPARE1_CLEAR_Enabled << TIMER_SHORTS_COMPARE1_CLEAR_Pos); timer->SHORTS = (TIMER_SHORTS_COMPARE2_CLEAR_Enabled << TIMER_SHORTS_COMPARE2_CLEAR_Pos); timer->SHORTS = (TIMER_SHORTS_COMPARE3_CLEAR_Enabled << TIMER_SHORTS_COMPARE3_CLEAR_Pos); + + /* start the timer */ timer->TASKS_START = 1; - return 1; + return 0; } int timer_set(tim_t dev, int channel, unsigned int timeout) diff --git a/cpu/nrf51822/periph/uart.c b/cpu/nrf51822/periph/uart.c index d99966a799..80c6101968 100644 --- a/cpu/nrf51822/periph/uart.c +++ b/cpu/nrf51822/periph/uart.c @@ -15,6 +15,7 @@ * * @author Christian Kühling * @author Timo Ziegler + * @author Hauke Petersen * * @} */ @@ -117,18 +118,29 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate) switch (uart) { #if UART_0_EN case UART_0: + /* power on UART device */ + UART_0_DEV->POWER = 1; + /* reset configuration registers */ UART_0_DEV->CONFIG = 0; /* select baudrate */ UART_0_DEV->BAUDRATE = baudrate_real; + /* configure RX/TX pin modes */ + NRF_GPIO->DIRSET = (1 << UART_0_PIN_TX); + NRF_GPIO->DIRCLR = (1 << UART_0_PIN_RX); + /* configure UART pins to use */ UART_0_DEV->PSELTXD = UART_0_PIN_TX; UART_0_DEV->PSELRXD = UART_0_PIN_RX; /* enable hw-flow control if defined */ #if UART_0_HWFLOWCTRL + /* set pin mode for RTS and CTS pins */ + NRF_GPIO->DIRSET = (1 << UART_0_PIN_RTS); + NRF_GPIO->DIRSET = (1 << UART_0_PIN_CTS); + /* configure RTS and CTS pins to use */ UART_0_DEV->PSELRTS = UART_0_PIN_RTS; UART_0_DEV->PSELCTS = UART_0_PIN_CTS; UART_0_DEV->CONFIG |= 1; /* enable HW flow control */ @@ -147,8 +159,6 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate) #endif } - DEBUG("UART INITIALIZATION complete\n"); - return 0; } @@ -208,4 +218,30 @@ int uart_write_blocking(uart_t uart, char data) return 1; } +void uart_poweron(uart_t uart) +{ + switch (uart) { +#if UART_0_EN + case UART_0: + UART_0_DEV->POWER = 1; + break; +#endif + default: + return; + } +} + +void uart_poweroff(uart_t uart) +{ + switch (uart) { +#if UART_0_EN + case UART_0: + UART_0_DEV->POWER = 0; + break; +#endif + default: + return; + } +} + #endif /* UART_NUMOF */ diff --git a/cpu/nrf51822/startup.c b/cpu/nrf51822/startup.c index aaaaa0c82c..f229ba5073 100644 --- a/cpu/nrf51822/startup.c +++ b/cpu/nrf51822/startup.c @@ -90,8 +90,12 @@ void isr_nmi(void) void isr_hard_fault(void) { - LED_RED_ON; - while (1) {asm ("nop");} + while (1) { + for (int i = 0; i < 500000; i++) { + asm("nop"); + } + LED_RED_TOGGLE; + } } /* Cortex-M specific interrupt vectors */