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cpu/stm32: enable HSI48 for periph_usbdev
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@ -128,8 +128,8 @@
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#define CLOCK_APB2_DIV (RCC_CFGR2_PPRE2_2 | RCC_CFGR2_PPRE2_1 | RCC_CFGR2_PPRE2_0)
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#endif
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/* Only periph_hwrng requires HSI RC with 48MHz for the moment */
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#if IS_USED(MODULE_PERIPH_HWRNG)
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/* Only periph_hwrng and periph_usbdev require HSI RC with 48MHz for the moment */
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#if IS_USED(MODULE_PERIPH_HWRNG) || IS_USED(MODULE_PERIPH_USBDEV_CLK)
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#define CLOCK_ENABLE_HSI48 1
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#else
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#define CLOCK_ENABLE_HSI48 0
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