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cpu/sam0_common/periph/spi: power off spi bus on release
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c5ad13cb18
@ -126,20 +126,18 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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/* power on the device */
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poweron(bus);
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/* configuration did not change */
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if (dev(bus)->BAUD.reg == baud && dev(bus)->CTRLA.reg == ctrla) {
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return SPI_OK;
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/* first configuration or reconfiguration after altered device usage */
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if (dev(bus)->BAUD.reg != baud || dev(bus)->CTRLA.reg != ctrla) {
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/* disable the device */
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dev(bus)->CTRLA.reg &= ~(SERCOM_SPI_CTRLA_ENABLE);
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while (dev(bus)->SYNCBUSY.reg & SERCOM_SPI_SYNCBUSY_ENABLE) {}
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dev(bus)->BAUD.reg = baud;
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dev(bus)->CTRLA.reg = ctrla;
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/* no synchronization needed here, the enable synchronization below
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* acts as a write-synchronization for both registers */
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}
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/* disable the device */
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dev(bus)->CTRLA.reg &= ~(SERCOM_SPI_CTRLA_ENABLE);
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while (dev(bus)->SYNCBUSY.reg & SERCOM_SPI_SYNCBUSY_ENABLE) {}
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dev(bus)->BAUD.reg = baud;
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dev(bus)->CTRLA.reg = ctrla;
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/* also no synchronization needed here, as CTRLA is write-synchronized */
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/* finally enable the device */
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dev(bus)->CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE;
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while (dev(bus)->SYNCBUSY.reg & SERCOM_SPI_SYNCBUSY_ENABLE) {}
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@ -149,6 +147,13 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_release(spi_t bus)
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{
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/* disable the device */
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dev(bus)->CTRLA.reg &= ~(SERCOM_SPI_CTRLA_ENABLE);
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while (dev(bus)->SYNCBUSY.reg & SERCOM_SPI_SYNCBUSY_ENABLE) {}
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/* power off the device */
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poweroff(bus);
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/* release access to the device */
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mutex_unlock(&locks[bus]);
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}
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