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nrf24l01p: Acquire exclusive access to SPI bus.

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Signed-off-by: Joakim Gebart <joakim.gebart@eistec.se>
This commit is contained in:
Joakim Gebart 2015-01-16 13:47:38 +01:00
parent b6d94d9525
commit c457cd954d
1 changed files with 52 additions and 1 deletions
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53
drivers/nrf24l01p/nrf24l01p.c
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@ -10,10 +10,12 @@
* @ingroup drivers_nrf24l01p
* @{
* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de>
* @author Joakim Gebart <joakim.gebart@eistec.se>
* @}
*/
#include "nrf24l01p.h"
#include "nrf24l01p_settings.h"
#include "mutex.h"
#include "periph/gpio.h"
#include "periph/spi.h"
#include "hwtimer.h"
@ -29,11 +31,15 @@ int nrf24l01p_read_reg(nrf24l01p_t *dev, char reg, char *answer)
{
int status;
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_reg(dev->spi, (CMD_R_REGISTER | (REGISTER_MASK & reg)), CMD_NOP, answer);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);
@ -45,11 +51,15 @@ int nrf24l01p_write_reg(nrf24l01p_t *dev, char reg, char write)
int status;
char reg_content;
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_reg(dev->spi, (CMD_W_REGISTER | (REGISTER_MASK & reg)), write, &reg_content);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);
@ -82,7 +92,9 @@ int nrf24l01p_init(nrf24l01p_t *dev, spi_t spi, gpio_t ce, gpio_t cs, gpio_t irq
/* Init SPI */
spi_poweron(dev->spi);
spi_acquire(dev->spi);
status = spi_init_master(dev->spi, SPI_CONF_FIRST_RISING, SPI_SPEED_400KHZ);
spi_release(dev->spi);
if (status < 0) {
return status;
@ -223,12 +235,16 @@ int nrf24l01p_read_payload(nrf24l01p_t *dev, char *answer, unsigned int size)
{
int status;
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_regs(dev->spi, CMD_R_RX_PAYLOAD, 0, answer, size);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);
/* Release the bus for other threads. */
spi_release(dev->spi);
return status;
}
@ -272,11 +288,15 @@ int nrf24l01p_preload(nrf24l01p_t *dev, char *data, unsigned int size)
size = (size <= 32) ? size : 32;
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_regs(dev->spi, CMD_W_TX_PAYLOAD, data, NULL, size);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);
@ -373,11 +393,15 @@ int nrf24l01p_set_tx_address(nrf24l01p_t *dev, char *saddr, unsigned int length)
{
int status;
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_regs(dev->spi, (CMD_W_REGISTER | (REGISTER_MASK & REG_TX_ADDR)), saddr, NULL, length); /* address width is 5 byte */
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);
@ -400,11 +424,15 @@ int nrf24l01p_set_tx_address_long(nrf24l01p_t *dev, uint64_t saddr, unsigned int
return -1;
}
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_regs(dev->spi, (CMD_W_REGISTER | (REGISTER_MASK & REG_TX_ADDR)), buf, NULL, length); /* address width is 5 byte */
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);
@ -417,11 +445,15 @@ uint64_t nrf24l01p_get_tx_address_long(nrf24l01p_t *dev)
uint64_t saddr_64 = 0;
char addr_array[INITIAL_ADDRESS_WIDTH];
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_regs(dev->spi, (CMD_R_REGISTER | (REGISTER_MASK & REG_TX_ADDR)), 0, addr_array, INITIAL_ADDRESS_WIDTH); /* address width is 5 byte */
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);
@ -473,11 +505,15 @@ int nrf24l01p_set_rx_address(nrf24l01p_t *dev, nrf24l01p_rx_pipe_t pipe, char *s
return -1;
}
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_regs(dev->spi, (CMD_W_REGISTER | (REGISTER_MASK & pipe_addr)), saddr, NULL, length); /* address width is 5 byte */
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);
@ -541,11 +577,15 @@ uint64_t nrf24l01p_get_rx_address_long(nrf24l01p_t *dev, nrf24l01p_rx_pipe_t pip
return -1;
}
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_regs(dev->spi, (CMD_R_REGISTER | (REGISTER_MASK & pipe_addr)), 0, addr_array, INITIAL_ADDRESS_WIDTH); /* address width is 5 byte */
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
if (status < 0) {
return -1;
@ -592,11 +632,15 @@ int nrf24l01p_set_datarate(nrf24l01p_t *dev, nrf24l01p_dr_t dr)
int nrf24l01p_get_status(nrf24l01p_t *dev)
{
char status;
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
spi_transfer_byte(dev->spi, CMD_NOP, &status);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);
@ -831,11 +875,15 @@ int nrf24l01p_flush_tx_fifo(nrf24l01p_t *dev)
int status;
char reg_content;
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_byte(dev->spi, CMD_FLUSH_TX, &reg_content);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);
@ -847,12 +895,15 @@ int nrf24l01p_flush_rx_fifo(nrf24l01p_t *dev)
int status;
char reg_content;
/* Acquire exclusive access to the bus. */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
status = spi_transfer_byte(dev->spi, CMD_FLUSH_RX, &reg_content);
hwtimer_spin(DELAY_CS_TOGGLE_TICKS);
gpio_set(dev->cs);
/* Release the bus for other threads. */
spi_release(dev->spi);
hwtimer_spin(DELAY_AFTER_FUNC_TICKS);