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drivers/ads101x: update I2C API

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This commit is contained in:
Matthew Blue 2018-05-22 23:01:39 -04:00 committed by dylad
parent d48747f194
commit c3363587be
1 changed files with 30 additions and 28 deletions
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58
drivers/ads101x/ads101x.c
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@ -35,8 +35,6 @@
#define ADS101X_READ_DELAY (8 * US_PER_MS) /* Compatible with 128SPS */ #define ADS101X_READ_DELAY (8 * US_PER_MS) /* Compatible with 128SPS */
#endif #endif
#define I2C_SPEED I2C_SPEED_FAST
#define I2C (dev->params.i2c) #define I2C (dev->params.i2c)
#define ADDR (dev->params.addr) #define ADDR (dev->params.addr)
@ -67,24 +65,31 @@ int ads101x_alert_init(ads101x_alert_t *dev,
return _ads101x_init_test(I2C, ADDR); return _ads101x_init_test(I2C, ADDR);
} }
int _ads101x_init_test(i2c_t i2c, uint8_t addr) static int _ads101x_init_test(i2c_t i2c, uint8_t addr)
{ {
uint8_t regs[2]; uint8_t regs[2];
/* Acquire test */
i2c_acquire(i2c); i2c_acquire(i2c);
if (i2c_init_master(i2c, I2C_SPEED) < 0) {
/* Register read test */
if (i2c_read_regs(i2c, addr, ADS101X_CONF_ADDR, &regs, 2, 0x0) < 0) {
DEBUG("[ads101x] init - error: unable to read reg %x\n",
ADS101X_CONF_ADDR);
i2c_release(i2c); i2c_release(i2c);
DEBUG("[ads101x] init - error: unable to initialize I2C bus\n"); return ADS101X_NODEV;
return ADS101X_NOI2C;
} }
/* Register read/write test */
i2c_read_regs(i2c, addr, ADS101X_CONF_ADDR, &regs, 2);
regs[1] = (regs[1] & ~ADS101X_DATAR_MASK) | ADS101X_DATAR_3300; regs[1] = (regs[1] & ~ADS101X_DATAR_MASK) | ADS101X_DATAR_3300;
i2c_write_regs(i2c, addr, ADS101X_CONF_ADDR, &regs, 2); /* Register write test */
i2c_read_regs(i2c, addr, ADS101X_CONF_ADDR, &regs, 2); if (i2c_write_regs(i2c, addr, ADS101X_CONF_ADDR, &regs, 2, 0x0) < 0) {
DEBUG("[ads101x] init - error: unable to write reg %x\n",
ADS101X_CONF_ADDR);
i2c_release(i2c);
return ADS101X_NODEV;
}
i2c_read_regs(i2c, addr, ADS101X_CONF_ADDR, &regs, 2, 0x0);
i2c_release(i2c); i2c_release(i2c);
@ -103,7 +108,7 @@ int ads101x_set_mux_gain(const ads101x_t *dev, uint8_t mux_gain)
i2c_acquire(I2C); i2c_acquire(I2C);
i2c_read_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2); i2c_read_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2, 0x0);
/* Zero mux and gain */ /* Zero mux and gain */
regs[0] &= ~ADS101X_MUX_MASK; regs[0] &= ~ADS101X_MUX_MASK;
@ -112,7 +117,7 @@ int ads101x_set_mux_gain(const ads101x_t *dev, uint8_t mux_gain)
/* Write mux and gain */ /* Write mux and gain */
regs[0] |= mux_gain; regs[0] |= mux_gain;
i2c_write_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2); i2c_write_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2, 0x0);
i2c_release(I2C); i2c_release(I2C);
@ -122,30 +127,27 @@ int ads101x_set_mux_gain(const ads101x_t *dev, uint8_t mux_gain)
int ads101x_read_raw(const ads101x_t *dev, int16_t *raw) int ads101x_read_raw(const ads101x_t *dev, int16_t *raw)
{ {
uint8_t regs[2]; uint8_t regs[2];
int status;
i2c_acquire(I2C); i2c_acquire(I2C);
/* Read control register */ /* Read control register */
i2c_read_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2); i2c_read_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2, 0x0);
/* Tell the ADC to aquire a single-shot sample */ /* Tell the ADC to aquire a single-shot sample */
regs[0] |= ADS101X_CONF_OS_CONV; regs[0] |= ADS101X_CONF_OS_CONV;
i2c_write_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2); i2c_write_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2, 0x0);
/* Wait for the sample to be aquired */ /* Wait for the sample to be aquired */
xtimer_usleep(ADS101X_READ_DELAY); xtimer_usleep(ADS101X_READ_DELAY);
/* Read the sample */ /* Read the sample */
status = i2c_read_regs(I2C, ADDR, ADS101X_CONV_RES_ADDR, &regs, 2); if (i2c_read_regs(I2C, ADDR, ADS101X_CONV_RES_ADDR, &regs, 2, 0x0) < 0) {
i2c_release(I2C);
i2c_release(I2C);
/* Status should equal bytes asked for (2) */
if (status != 2) {
return ADS101X_NODATA; return ADS101X_NODATA;
} }
i2c_release(I2C);
/* If all okay, change raw value */ /* If all okay, change raw value */
*raw = (int16_t)(regs[0] << 8) | (int16_t)(regs[1]); *raw = (int16_t)(regs[0] << 8) | (int16_t)(regs[1]);
@ -163,11 +165,11 @@ int ads101x_enable_alert(ads101x_alert_t *dev,
/* Read control register */ /* Read control register */
i2c_acquire(I2C); i2c_acquire(I2C);
i2c_read_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2); i2c_read_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2, 0x0);
/* Enable alert comparator */ /* Enable alert comparator */
regs[1] &= ~ADS101X_CONF_COMP_DIS; regs[1] &= ~ADS101X_CONF_COMP_DIS;
i2c_write_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2); i2c_write_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2, 0x0);
i2c_release(I2C); i2c_release(I2C);
@ -189,15 +191,15 @@ int ads101x_set_alert_parameters(const ads101x_alert_t *dev,
/* Set up low_limit */ /* Set up low_limit */
regs[0] = (uint8_t)(low_limit >> 8); regs[0] = (uint8_t)(low_limit >> 8);
regs[1] = (uint8_t)low_limit; regs[1] = (uint8_t)low_limit;
i2c_write_regs(I2C, ADDR, ADS101X_LOW_LIMIT_ADDR, &regs, 2); i2c_write_regs(I2C, ADDR, ADS101X_LOW_LIMIT_ADDR, &regs, 2, 0x0);
/* Set up high_limit */ /* Set up high_limit */
regs[0] = (uint8_t)(high_limit >> 8); regs[0] = (uint8_t)(high_limit >> 8);
regs[1] = (uint8_t)high_limit; regs[1] = (uint8_t)high_limit;
i2c_write_regs(I2C, ADDR, ADS101X_HIGH_LIMIT_ADDR, &regs, 2); i2c_write_regs(I2C, ADDR, ADS101X_HIGH_LIMIT_ADDR, &regs, 2, 0x0);
/* Read control register */ /* Read control register */
i2c_read_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2); i2c_read_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2, 0x0);
/* Set up window mode */ /* Set up window mode */
if (low_limit != 0) { if (low_limit != 0) {
@ -208,7 +210,7 @@ int ads101x_set_alert_parameters(const ads101x_alert_t *dev,
/* Disable window mode */ /* Disable window mode */
regs[1] &= ~ADS101X_CONF_COMP_MODE_WIND; regs[1] &= ~ADS101X_CONF_COMP_MODE_WIND;
} }
i2c_write_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2); i2c_write_regs(I2C, ADDR, ADS101X_CONF_ADDR, &regs, 2, 0x0);
i2c_release(I2C); i2c_release(I2C);