From c26365c9fbc9b3d4c25b75757d8609967c7b142d Mon Sep 17 00:00:00 2001 From: Jose Alamos Date: Mon, 28 Nov 2022 16:25:27 +0100 Subject: [PATCH] drivers/at86rf2xx: merge configure_phy and set_txpower functions --- drivers/at86rf2xx/at86rf2xx.c | 5 +- drivers/at86rf2xx/at86rf2xx_getset.c | 59 ++++++++++++++++++- drivers/at86rf2xx/at86rf2xx_internal.c | 58 ------------------ drivers/at86rf2xx/at86rf2xx_netdev.c | 6 +- .../at86rf2xx/include/at86rf2xx_internal.h | 3 + 5 files changed, 68 insertions(+), 63 deletions(-) diff --git a/drivers/at86rf2xx/at86rf2xx.c b/drivers/at86rf2xx/at86rf2xx.c index 9b89c75294..77e6daab93 100644 --- a/drivers/at86rf2xx/at86rf2xx.c +++ b/drivers/at86rf2xx/at86rf2xx.c @@ -82,10 +82,9 @@ void at86rf2xx_reset(at86rf2xx_t *dev) at86rf2xx_set_state(dev, AT86RF2XX_STATE_FORCE_TRX_OFF); } - /* set default channel and page */ + /* set default channel, page and TX power */ at86rf2xx_configure_phy(dev, AT86RF2XX_DEFAULT_CHANNEL, AT86RF2XX_DEFAULT_PAGE, AT86RF2XX_DEFAULT_TXPOWER); - /* set default TX power */ - at86rf2xx_set_txpower(dev, AT86RF2XX_DEFAULT_TXPOWER, AT86RF2XX_DEFAULT_CHANNEL); + /* set default options */ if (!IS_ACTIVE(AT86RF2XX_BASIC_MODE)) { diff --git a/drivers/at86rf2xx/at86rf2xx_getset.c b/drivers/at86rf2xx/at86rf2xx_getset.c index d4c2d0a556..6101f22bb5 100644 --- a/drivers/at86rf2xx/at86rf2xx_getset.c +++ b/drivers/at86rf2xx/at86rf2xx_getset.c @@ -132,7 +132,7 @@ void at86rf2xx_set_pan(at86rf2xx_t *dev, uint16_t pan) at86rf2xx_reg_write(dev, AT86RF2XX_REG__PAN_ID_1, le_pan.u8[1]); } -void at86rf2xx_set_txpower(const at86rf2xx_t *dev, int16_t txpower, uint8_t channel) +static inline void _set_txpower(const at86rf2xx_t *dev, int16_t txpower, uint8_t channel) { (void) channel; txpower += AT86RF2XX_TXPOWER_OFF; @@ -158,6 +158,63 @@ void at86rf2xx_set_txpower(const at86rf2xx_t *dev, int16_t txpower, uint8_t chan #endif } +void at86rf2xx_configure_phy(at86rf2xx_t *dev, uint8_t chan, uint8_t page, int16_t txpower) +{ + /* we must be in TRX_OFF before changing the PHY configuration */ + uint8_t prev_state = at86rf2xx_set_state(dev, AT86RF2XX_STATE_TRX_OFF); + (void) page; + (void) chan; + (void) txpower; + +#if AT86RF2XX_HAVE_SUBGHZ + /* The TX power register must be updated after changing the channel if + * moving between bands. */ + + uint8_t trx_ctrl2 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__TRX_CTRL_2); + uint8_t rf_ctrl0 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__RF_CTRL_0); + + /* Clear previous configuration for PHY mode */ + trx_ctrl2 &= ~(AT86RF2XX_TRX_CTRL_2_MASK__FREQ_MODE); + /* Clear previous configuration for GC_TX_OFFS */ + rf_ctrl0 &= ~AT86RF2XX_RF_CTRL_0_MASK__GC_TX_OFFS; + + if (chan != 0) { + /* Set sub mode bit on 915 MHz as recommended by the data sheet */ + trx_ctrl2 |= AT86RF2XX_TRX_CTRL_2_MASK__SUB_MODE; + } + + if (page == 0) { + /* BPSK coding */ + /* Data sheet recommends using a +2 dB setting for BPSK */ + rf_ctrl0 |= AT86RF2XX_RF_CTRL_0_GC_TX_OFFS__2DB; + } + else if (page == 2) { + /* O-QPSK coding */ + trx_ctrl2 |= AT86RF2XX_TRX_CTRL_2_MASK__BPSK_OQPSK; + /* Data sheet recommends using a +1 dB setting for O-QPSK */ + rf_ctrl0 |= AT86RF2XX_RF_CTRL_0_GC_TX_OFFS__1DB; + } + + at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2, trx_ctrl2); + at86rf2xx_reg_write(dev, AT86RF2XX_REG__RF_CTRL_0, rf_ctrl0); +#endif + + uint8_t phy_cc_cca = at86rf2xx_reg_read(dev, AT86RF2XX_REG__PHY_CC_CCA); + /* Clear previous configuration for channel number */ + phy_cc_cca &= ~(AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL); + + /* Update the channel register */ + phy_cc_cca |= (chan & AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL); + at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_CC_CCA, phy_cc_cca); + + /* Update the TX power register to achieve the same power (in dBm) */ + _set_txpower(dev, txpower, chan); + + /* Return to the state we had before reconfiguring */ + at86rf2xx_set_state(dev, prev_state); +} + + int8_t at86rf2xx_get_rxsensitivity(const at86rf2xx_t *dev) { uint8_t rxsens = at86rf2xx_reg_read(dev, AT86RF2XX_REG__RX_SYN) diff --git a/drivers/at86rf2xx/at86rf2xx_internal.c b/drivers/at86rf2xx/at86rf2xx_internal.c index f1f5b9819e..bc60316ba3 100644 --- a/drivers/at86rf2xx/at86rf2xx_internal.c +++ b/drivers/at86rf2xx/at86rf2xx_internal.c @@ -164,64 +164,6 @@ void at86rf2xx_hardware_reset(at86rf2xx_t *dev) && (dev->state != AT86RF2XX_STATE_P_ON)); } -void at86rf2xx_configure_phy(at86rf2xx_t *dev, uint8_t chan, uint8_t page, int16_t txpower) -{ - /* we must be in TRX_OFF before changing the PHY configuration */ - uint8_t prev_state = at86rf2xx_set_state(dev, AT86RF2XX_STATE_TRX_OFF); - (void) page; - (void) chan; - (void) txpower; - -#if AT86RF2XX_HAVE_SUBGHZ - /* The TX power register must be updated after changing the channel if - * moving between bands. */ - - uint8_t trx_ctrl2 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__TRX_CTRL_2); - uint8_t rf_ctrl0 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__RF_CTRL_0); - - /* Clear previous configuration for PHY mode */ - trx_ctrl2 &= ~(AT86RF2XX_TRX_CTRL_2_MASK__FREQ_MODE); - /* Clear previous configuration for GC_TX_OFFS */ - rf_ctrl0 &= ~AT86RF2XX_RF_CTRL_0_MASK__GC_TX_OFFS; - - if (chan != 0) { - /* Set sub mode bit on 915 MHz as recommended by the data sheet */ - trx_ctrl2 |= AT86RF2XX_TRX_CTRL_2_MASK__SUB_MODE; - } - - if (page == 0) { - /* BPSK coding */ - /* Data sheet recommends using a +2 dB setting for BPSK */ - rf_ctrl0 |= AT86RF2XX_RF_CTRL_0_GC_TX_OFFS__2DB; - } - else if (page == 2) { - /* O-QPSK coding */ - trx_ctrl2 |= AT86RF2XX_TRX_CTRL_2_MASK__BPSK_OQPSK; - /* Data sheet recommends using a +1 dB setting for O-QPSK */ - rf_ctrl0 |= AT86RF2XX_RF_CTRL_0_GC_TX_OFFS__1DB; - } - - at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2, trx_ctrl2); - at86rf2xx_reg_write(dev, AT86RF2XX_REG__RF_CTRL_0, rf_ctrl0); -#endif - - uint8_t phy_cc_cca = at86rf2xx_reg_read(dev, AT86RF2XX_REG__PHY_CC_CCA); - /* Clear previous configuration for channel number */ - phy_cc_cca &= ~(AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL); - - /* Update the channel register */ - phy_cc_cca |= (chan & AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL); - at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_CC_CCA, phy_cc_cca); - -#if AT86RF2XX_HAVE_SUBGHZ - /* Update the TX power register to achieve the same power (in dBm) */ - at86rf2xx_set_txpower(dev, txpower, chan); -#endif - - /* Return to the state we had before reconfiguring */ - at86rf2xx_set_state(dev, prev_state); -} - #if AT86RF2XX_RANDOM_NUMBER_GENERATOR void at86rf2xx_get_random(at86rf2xx_t *dev, uint8_t *data, size_t len) { diff --git a/drivers/at86rf2xx/at86rf2xx_netdev.c b/drivers/at86rf2xx/at86rf2xx_netdev.c index 8c3b679d49..935b3a75e6 100644 --- a/drivers/at86rf2xx/at86rf2xx_netdev.c +++ b/drivers/at86rf2xx/at86rf2xx_netdev.c @@ -658,7 +658,11 @@ static int _set(netdev_t *netdev, netopt_t opt, const void *val, size_t len) case NETOPT_TX_POWER: assert(len <= sizeof(int16_t)); netdev_ieee802154->txpower = *((const int16_t *)val); - at86rf2xx_set_txpower(dev, *((const int16_t *)val), dev->netdev.chan); +#if AT86RF2XX_HAVE_SUBGHZ + at86rf2xx_configure_phy(dev, dev->netdev.chan, dev->page, *((const int16_t *)val)); +#else + at86rf2xx_configure_phy(dev, dev->netdev.chan, 0, *((const int16_t *)val)); +#endif res = sizeof(uint16_t); break; diff --git a/drivers/at86rf2xx/include/at86rf2xx_internal.h b/drivers/at86rf2xx/include/at86rf2xx_internal.h index e16109e9c8..ce9da53fb8 100644 --- a/drivers/at86rf2xx/include/at86rf2xx_internal.h +++ b/drivers/at86rf2xx/include/at86rf2xx_internal.h @@ -220,6 +220,9 @@ void at86rf2xx_hardware_reset(at86rf2xx_t *dev); * @brief Set PHY parameters based on channel and page number * * @param[in,out] dev device to configure + * @param[in] chan channel number to be set + * @param[in] page channel page + * @param[in] txpower TX power in dBm */ void at86rf2xx_configure_phy(at86rf2xx_t *dev, uint8_t chan, uint8_t page, int16_t txpower);