Merge pull request #12141 from aabadie/pr/boards/stm32_common_i2c

boards/stm32: introduce and use shared i2c config with I2C1 on PB6/PB7

boards/common/stm32/include/cfg_i2c1_pb6_pb7.h

@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2019 Inria
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_common_stm32
+ * @{
+ *
+ * @file
+ * @brief       Common configuration for STM32 I2C
+ *
+ * @author      Alexandre Abadie <alexandre.abadie@inria.fr>
+ */
+
+#ifndef CFG_I2C1_PB6_PB7_H
+#define CFG_I2C1_PB6_PB7_H
+
+#include "periph_cpu.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @name I2C configuration
+ * @{
+ */
+static const i2c_conf_t i2c_config[] = {
+    {
+        .dev            = I2C1,
+        .speed          = I2C_SPEED_NORMAL,
+        .scl_pin        = GPIO_PIN(PORT_B, 6),
+        .sda_pin        = GPIO_PIN(PORT_B, 7),
+#if CPU_FAM_STM32L4
+        .scl_af         = GPIO_AF4,
+        .sda_af         = GPIO_AF4,
+#else /* CPU_FAM_STM32L0 */
+        .scl_af         = GPIO_AF1,
+        .sda_af         = GPIO_AF1,
+#endif
+        .bus            = APB1,
+#if CPU_FAM_STM32L4
+        .rcc_mask       = RCC_APB1ENR1_I2C1EN,
+        .irqn           = I2C1_ER_IRQn,
+#else /* CPU_FAM_STM32L0 */
+        .rcc_mask       = RCC_APB1ENR_I2C1EN,
+        .irqn           = I2C1_IRQn
+#endif
+    }
+};
+
+#if CPU_FAM_STM32L4
+#define I2C_0_ISR           isr_i2c1_er
+#else /* CPU_FAM_STM32L0 */
+#define I2C_0_ISR           isr_i2c1
+#endif
+
+#define I2C_NUMOF           ARRAY_SIZE(i2c_config)
+/** @} */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CFG_I2C1_PB6_PB7_H */
+/** @} */

boards/nucleo-l031k6/include/periph_conf.h

@@ -23,6 +23,7 @@
 
 #include "periph_cpu.h"
 #include "l0/cfg_clock_32_16_1.h"
+#include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_rtt_default.h"
 #include "cfg_timer_tim2.h"
 
@@ -127,29 +128,6 @@ static const spi_conf_t spi_config[] = {
 #define ADC_NUMOF           (7U)
 /** @} */
 
-/**
- * @name I2C configuration
- * @{
- */
-static const i2c_conf_t i2c_config[] = {
-    {
-        .dev            = I2C1,
-        .speed          = I2C_SPEED_NORMAL,
-        .scl_pin        = GPIO_PIN(PORT_B, 6),
-        .sda_pin        = GPIO_PIN(PORT_B, 7),
-        .scl_af         = GPIO_AF1,
-        .sda_af         = GPIO_AF1,
-        .bus            = APB1,
-        .rcc_mask       = RCC_APB1ENR_I2C1EN,
-        .irqn           = I2C1_IRQn
-    }
-};
-
-#define I2C_0_ISR           isr_i2c1
-
-#define I2C_NUMOF           ARRAY_SIZE(i2c_config)
-/** @} */
-
 #ifdef __cplusplus
 }
 #endif

boards/nucleo-l432kc/include/periph_conf.h

@@ -22,6 +22,7 @@
 #define PERIPH_CONF_H
 
 #include "periph_cpu.h"
+#include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_rtt_default.h"
 #include "cfg_timer_tim2.h"
 
@@ -170,29 +171,6 @@ static const spi_conf_t spi_config[] = {
 #define SPI_NUMOF           ARRAY_SIZE(spi_config)
 /** @} */
 
-/**
- * @name I2C configuration
- * @{
- */
-static const i2c_conf_t i2c_config[] = {
-    {
-        .dev            = I2C1,
-        .speed          = I2C_SPEED_NORMAL,
-        .scl_pin        = GPIO_PIN(PORT_B, 6),
-        .sda_pin        = GPIO_PIN(PORT_B, 7),
-        .scl_af         = GPIO_AF4,
-        .sda_af         = GPIO_AF4,
-        .bus            = APB1,
-        .rcc_mask       = RCC_APB1ENR1_I2C1EN,
-        .irqn           = I2C1_ER_IRQn
-    }
-};
-
-#define I2C_0_ISR           isr_i2c1_er
-
-#define I2C_NUMOF           ARRAY_SIZE(i2c_config)
-/** @} */
-
 #ifdef __cplusplus
 }
 #endif