From be9dcece233a501e8bc9e9195f1625bc30718423 Mon Sep 17 00:00:00 2001 From: Kaspar Schleiser Date: Wed, 18 Mar 2015 15:58:26 +0100 Subject: [PATCH] nucleo-f334: add SPI pin defines --- boards/nucleo-f334/Makefile.features | 1 + boards/nucleo-f334/include/periph_conf.h | 31 ++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/boards/nucleo-f334/Makefile.features b/boards/nucleo-f334/Makefile.features index 53e4531068..6d5c4c629f 100644 --- a/boards/nucleo-f334/Makefile.features +++ b/boards/nucleo-f334/Makefile.features @@ -1,4 +1,5 @@ FEATURES_PROVIDED += periph_cpuid +FEATURES_PROVIDED += periph_spi FEATURES_PROVIDED += periph_uart FEATURES_PROVIDED += cpp FEATURES_MCU_GROUP = cortex_m4 diff --git a/boards/nucleo-f334/include/periph_conf.h b/boards/nucleo-f334/include/periph_conf.h index 8d668f627d..891efd49ef 100644 --- a/boards/nucleo-f334/include/periph_conf.h +++ b/boards/nucleo-f334/include/periph_conf.h @@ -14,6 +14,7 @@ * @brief Peripheral MCU configuration for the nucleo-f334 board * * @author Hauke Petersen + * @author Kaspar Schleiser */ #ifndef __PERIPH_CONF_H @@ -78,6 +79,36 @@ extern "C" { #define UART_0_AF 7 /** @} */ +/** + * @name SPI configuration + * @{ + */ +#define SPI_NUMOF (1U) +#define SPI_0_EN 1 +#define SPI_IRQ_PRIO 1 + +/* SPI 0 device config */ +#define SPI_0_DEV SPI1 +#define SPI_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_SPI1EN) +#define SPI_0_CLKDIS() (RCC->APB2ENR &= ~RCC_APB2ENR_SPI1EN) +#define SPI_0_IRQ SPI1_IRQn +#define SPI_0_IRQ_HANDLER isr_spi1 +/* SPI 0 pin configuration */ +#define SPI_0_SCK_PORT GPIOA +#define SPI_0_SCK_PIN 5 +#define SPI_0_SCK_AF 5 +#define SPI_0_SCK_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN) +#define SPI_0_MISO_PORT GPIOA +#define SPI_0_MISO_PIN 6 +#define SPI_0_MISO_AF 5 +#define SPI_0_MISO_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN) +#define SPI_0_MOSI_PORT GPIOA +#define SPI_0_MOSI_PIN 7 +#define SPI_0_MOSI_AF 5 +#define SPI_0_MOSI_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN) +/** @} */ + + #ifdef __cplusplus } #endif