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Merge #19904
19904: cpu/stm32: bump cmsis packages version r=aabadie a=aabadie Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
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@ -3,36 +3,36 @@ PKG_NAME=stm32cmsis
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# The package URL depends on the family of the target STM32
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PKG_URL=https://github.com/STMicroelectronics/cmsis_device_$(CPU_FAM)
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# v2.3.6
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PKG_VERSION_f0=8b86197c7ab77ad029c34dc73cf6d4a1e12327d8
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# v4.3.3
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PKG_VERSION_f1=71ad5b3bf5cbb4d35cf8c8726c1b343871f0df0a
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# v2.2.5
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PKG_VERSION_f2=694c49f696d359f57f23153ab7acf3ac1a43f663
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# v2.3.6
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PKG_VERSION_f3=167eefd811de90a58c41e0a32071cdfecede389a
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# v2.6.7
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PKG_VERSION_f4=6fe2c1f498feda34ee422720ff8b3bd1b4656145
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# v1.2.6
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PKG_VERSION_f7=0abe04b1c85a848f1cec8dd4b2893dc8e3f07757
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# v1.4.1
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PKG_VERSION_g0=051d85f2f5a9b5d67d2fbb4e97861b2e8ec1ef89
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# v1.2.1
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PKG_VERSION_g4=3a3a8909720e37bece786f6011ba865951b369c8
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# v1.9.2
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PKG_VERSION_l0=532d96973e7b2ae5546a2c88cb216429f74f5f5d
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# v2.3.2
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PKG_VERSION_l1=1827333a7f7822282a6a46e4169596b5fb58cf61
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# v1.7.1
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PKG_VERSION_l4=26ed4846f831f730d852507e178061053e522daf
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# v1.0.4
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PKG_VERSION_l5=fcf61cd086e02c7a1cf7535ffe30622d1f5d36aa
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# v1.0.1
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PKG_VERSION_u5=147947d99f50554101d2a339ad19c2972c3ff161
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# v1.9.0
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PKG_VERSION_wb=3a801574163338b562f56e7eb503a955818f1a56
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# v1.1.0
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PKG_VERSION_wl=7bf548678b1132d829072ce86443c8036d538460
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# v2.3.7
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PKG_VERSION_f0=3973d99a89ac5fdf1f2593abc29a73d2981ce94a
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# v4.3.4
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PKG_VERSION_f1=49daecceeb4b251999a784995e8b8d714b59dbc2
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# v2.2.6
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PKG_VERSION_f2=30e6e50fb0bfc4456a468d74fc87b36465abaa5b
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# v2.3.7
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PKG_VERSION_f3=39da9163253cf49bf7c7ab9a9ced8a8ba943e87f
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# v2.6.8
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PKG_VERSION_f4=7ac69098b3e5f9b2d929acd4f087e92a7e59e0e9
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# v1.2.8
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PKG_VERSION_f7=25b0463439303b7a38f0d27b161f7d2f3c096e79
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# v1.4.3
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PKG_VERSION_g0=3a23e1224417f3f2d00300ecd620495e363f2094
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# v1.2.2
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PKG_VERSION_g4=371d9ecec9acc4d8b4baad36c8dc60cb9895baf7
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# v1.9.3
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PKG_VERSION_l0=69cd5999fd40ae6e546d4905b21635c6ca1bcb92
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# v2.3.3
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PKG_VERSION_l1=dafdef897e29b4f5934f1e2b9de9957410435476
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# v1.7.3
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PKG_VERSION_l4=013bf0e41256ffbc2b539676f2007d08b297a86a
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# v1.0.5
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PKG_VERSION_l5=a43f959bdb1e7449cbabe14356ca9309dbd48ad3
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# v1.3.0
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PKG_VERSION_u5=06d7edade7167b0eafdd550bf77cfc4fa98eae2e
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# v1.12.0
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PKG_VERSION_wb=d1b860584dfe24d40d455ae624ed14600dfa93c9
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# v1.2.0
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PKG_VERSION_wl=baa994d7bd83d7984675d6fce847cb7538118bf0
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PKG_VERSION=$(PKG_VERSION_$(CPU_FAM))
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PKG_LICENSE=Apache-2
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@ -33,14 +33,6 @@
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#define DEBUG_VERBOSE 0
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#include "debug.h"
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/* Workaround for typos in vendor files; drop when fixed upstream */
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#ifndef ETH_PTPTSCR_TSSSR
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#define ETH_PTPTSCR_TSSSR ETH_PTPTSSR_TSSSR
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#endif
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#ifndef ETH_PTPTSCR_TSSARFE
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#define ETH_PTPTSCR_TSSARFE ETH_PTPTSSR_TSSARFE
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#endif
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/* PTPSSIR is the number of nanoseconds to add onto the sub-second register
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* (the one counting the nanoseconds part of the timestamp with the
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* configuration we chose here). It is therefore the resolution of the clock
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@ -109,7 +101,7 @@ void ptp_init(void)
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ptp_clock_set(&initial_time);
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if (IS_USED(MODULE_PERIPH_ETH)) {
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/* enable timestamping of all received frames */
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ETH->PTPTSCR |= ETH_PTPTSSR_TSSARFE;
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ETH->PTPTSCR |= ETH_PTPTSCR_TSSARFE;
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}
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DEBUG("[periph_ptp] Initialized with PTPSAR = %" PRIu32 ", PTPSSIR = %" PRIu32 "\n",
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ptptsar, ptpssir);
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