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cpu/sam0_common/periph/i2c.c: attempt to unblock bus after error
This commit is contained in:
Daniel Lockau
parent
9c55be7237
commit
bb43dd8796
@ -26,10 +26,12 @@
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#include <stdint.h>
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#include <errno.h>
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#include "busy_wait.h"
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#include "cpu.h"
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#include "board.h"
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#include "mutex.h"
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#include "periph_conf.h"
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#include "periph/gpio.h"
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#include "periph/i2c.h"
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#include "sched.h"
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@ -49,7 +51,7 @@
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#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER SERCOM_I2CM_CTRLA_MODE(5)
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#endif
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static int _i2c_start(SercomI2cm *dev, uint16_t addr);
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static int _i2c_start(i2c_t dev_id, uint16_t addr);
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static inline int _write(SercomI2cm *dev, const uint8_t *data, size_t length,
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uint8_t stop);
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static inline int _read(SercomI2cm *dev, uint8_t *data, size_t length,
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@ -94,6 +96,77 @@ static void _reset(SercomI2cm *dev)
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#endif
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}
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/**
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* @brief Detect and recover a bus hangup
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*
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* Recover possible bus hangup by clocking peripheral
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* i2c device state machines into idle.
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* Hangup can occur if a transaction was interrupted
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* by a reset of the MCU.
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* Badly designed hardware can also cause a hangup
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* due to glitches on the bus.
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*
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* @param dev @ref i2c_t device to unblock
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* @return true if bus was not blocked or successfully unblocked,
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* false otherwise
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*/
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static bool _check_and_unblock_bus(i2c_t dev_id, bool initialized)
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{
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const i2c_conf_t *dev_conf = &i2c_config[dev_id];
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/* reconfigure pins to gpio for testing */
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gpio_disable_mux(dev_conf->sda_pin);
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gpio_disable_mux(dev_conf->scl_pin);
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gpio_init(dev_conf->sda_pin, GPIO_IN);
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gpio_set(dev_conf->scl_pin);
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gpio_init(dev_conf->scl_pin, GPIO_OUT);
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if (IS_ACTIVE(ENABLE_DEBUG)) {
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if (!gpio_read(dev_conf->sda_pin)) {
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printf("i2c.c: i2c bus hangup detected for bus #%u"
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" with configuration at 0x%08"PRIx32", recovering...\n",
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dev_id, (uint32_t)dev_conf);
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}
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else {
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printf("i2c.c: i2c bus #%u with configuration at"
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" 0x%08"PRIx32" is ok\n", dev_id, (uint32_t)dev_conf);
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}
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}
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/* check & conditionally try to recover bus */
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int max_cycles = 10; /* 9 clock cycles should be enough for making
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* any device that holds the SDA line in low
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* release the line. Actual number of cyccles may
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* vary depending on the device state.
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* The 10th cycle was added in case the first cycle
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* was not accepted by a device.
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*/
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while (gpio_read(dev_conf->sda_pin) == 0 && max_cycles--) {
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gpio_clear(dev_conf->scl_pin);
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busy_wait_us(50);
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gpio_set(dev_conf->scl_pin);
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busy_wait_us(50);
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}
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bool success = !!gpio_read(dev_conf->sda_pin);
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if (IS_ACTIVE(ENABLE_DEBUG) && !success) {
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DEBUG("i2c.c: i2c recovery failed for bus #%u\n", dev_id);
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}
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if (initialized) {
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/* reconfigure pins for i2c */
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gpio_init_mux(dev_conf->scl_pin, dev_conf->mux);
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gpio_init_mux(dev_conf->sda_pin, dev_conf->mux);
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/* reset bus state */
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dev_conf->dev->STATUS.reg = BUSSTATE_IDLE;
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_syncbusy(dev_conf->dev);
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}
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return success;
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}
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void i2c_init(i2c_t dev)
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{
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uint32_t timeout_counter = 0;
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@ -104,6 +177,11 @@ void i2c_init(i2c_t dev)
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const uint32_t fSCL = i2c_config[dev].speed;
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const uint32_t fGCLK = sam0_gclk_freq(i2c_config[dev].gclk_src);
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/* initial check if bus is blocked & resolve attempt */
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if (!_check_and_unblock_bus(dev, false)) {
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DEBUG("i2c.c: bus #%u is blocked - init will continue\n", dev);
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}
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/* Initialize mutex */
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mutex_init(&locks[dev]);
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@ -121,12 +199,12 @@ void i2c_init(i2c_t dev)
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/* Check if module is enabled. */
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if (bus(dev)->CTRLA.reg & SERCOM_I2CM_CTRLA_ENABLE) {
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DEBUG("STATUS_ERR_DENIED\n");
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DEBUG_PUTS("i2c.c: STATUS_ERR_DENIED");
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return;
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}
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/* Check if reset is in progress. */
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if (bus(dev)->CTRLA.reg & SERCOM_I2CM_CTRLA_SWRST) {
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DEBUG("STATUS_BUSY\n");
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DEBUG_PUTS("i2c.c: STATUS_BUSY");
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return;
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}
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@ -248,7 +326,7 @@ int i2c_read_bytes(i2c_t dev, uint16_t addr,
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if (!(flags & I2C_NOSTART)) {
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/* start transmission and send slave address */
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ret = _i2c_start(bus(dev), (addr << 1) | I2C_READ);
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ret = _i2c_start(dev, (addr << 1) | I2C_READ);
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if (ret < 0) {
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DEBUG("Start command failed\n");
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return ret;
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@ -289,7 +367,7 @@ int i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len,
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}
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if (!(flags & I2C_NOSTART)) {
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ret = _i2c_start(bus(dev), (addr<<1));
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ret = _i2c_start(dev, (addr<<1));
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if (ret < 0) {
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DEBUG("Start command failed\n");
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return ret;
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@ -326,51 +404,111 @@ void _i2c_poweroff(i2c_t dev)
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_syncbusy(bus(dev));
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}
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static int _i2c_start(SercomI2cm *dev, uint16_t addr)
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static int _i2c_start(i2c_t dev_id, uint16_t addr)
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{
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SercomI2cm *dev = bus(dev_id);
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/* Wait for hardware module to sync */
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DEBUG("Wait for device to be ready\n");
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DEBUG_PUTS("i2c.c: Wait for device to be ready");
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_syncbusy(dev);
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/* Set action to ACK. */
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dev->CTRLB.reg &= ~SERCOM_I2CM_CTRLB_ACKACT;
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/* Send Start | Address | Write/Read */
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DEBUG("Generate start condition by sending address\n");
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DEBUG("i2c.c: Generate start condition by sending address 0x%04"PRIu16"\n",
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addr);
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dev->ADDR.reg = addr;
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/* Wait for response on bus. */
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if (addr & I2C_READ) {
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/* Some devices (e.g. SHT2x) can hold the bus while
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preparing the reply */
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if (_wait_for_response(dev, 100 * SAMD21_I2C_TIMEOUT) < 0)
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return -ETIMEDOUT;
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/* Wait for response on bus.
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* Some devices (e.g. SHT2x) can hold the bus while
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* preparing the reply. */
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uint32_t timeout = (addr & I2C_READ) ? 100 * SAMD21_I2C_TIMEOUT : SAMD21_I2C_TIMEOUT;
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int res = _wait_for_response(dev, timeout);
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/* According to section 36.6.2.4.2 of the SAMD51/SAME54 datasheet
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* (also confirmed for SAML21),
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* the following flags are meaningful in address transmission
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* and will be checked here:
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*
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* - STATUS.ARBLOST: Arbitration lost, which should be
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* considered when INTFLAG.MB is set.
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* STATUS.BUSERR should also be set in this case
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* according to the datasheet.
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* - STATUS.RXNACK: ACK not received after sending the address.
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* Addressed device is busy or not present. This will also be set
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* with INTFLAG.MB.
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*
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* We further generally check for BUSERR and unexpected bus states.
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*
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* We ignore dev->INTFLAG.bit.ERROR altogether as it does not
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* seem to get set in the current configuration of the SERCOM module
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* (this finding applies to SAME54 / SAMD51 devices).
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*
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* We ignore the three timeout flags in the status register:
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* SERCOM_I2CM_STATUS_MEXTTOUT, SERCOM_I2CM_STATUS_LOWTOUT
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* SERCOM_I2CM_STATUS_SEXTTOUT.
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*
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* We further ignore SERCOM_I2CM_STATUS_LENERR (useful in 32 bit
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* mode and with DMA, not related to address transmission).
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*/
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uint16_t intflag = dev->INTFLAG.reg;
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uint16_t status = dev->STATUS.reg;
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/* handle errors */
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bool unblock_bus = false;
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if (res) {
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DEBUG_PUTS("i2c.c: STATUS_ERR_TIMEOUT");
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unblock_bus = true;
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}
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else {
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if (_wait_for_response(dev, SAMD21_I2C_TIMEOUT) < 0)
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return -ETIMEDOUT;
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else if ((status & SERCOM_I2CM_STATUS_BUSSTATE_Msk) == BUSSTATE_BUSY) {
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DEBUG_PUTS("i2c.c: STATUS_ERR_BUS_BUSY");
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unblock_bus = true;
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res = -EAGAIN;
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}
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else if ((status & SERCOM_I2CM_STATUS_BUSSTATE_Msk) == BUSSTATE_UNKNOWN) {
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DEBUG_PUTS("i2c.c: STATUS_ERR_BUS_STATE_UNKNOWN");
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unblock_bus = true;
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res = -EIO;
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}
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else if ((intflag & SERCOM_I2CM_INTFLAG_MB) &&
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(status & SERCOM_I2CM_STATUS_ARBLOST)) {
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DEBUG_PUTS("i2c.c: STATUS_ERR_ARBLOST");
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res = -EAGAIN;
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}
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else if (status & SERCOM_I2CM_STATUS_BUSERR) {
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/* a bus error not related to a lost arbitration */
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DEBUG_PUTS("i2c.c: STATUS_ERR_BUSERR");
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unblock_bus = true;
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res = -EIO;
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}
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else if ((intflag & SERCOM_I2CM_INTFLAG_MB) &&
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(status & SERCOM_I2CM_STATUS_RXNACK)) {
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/* datasheet recommends: send ack + stop condition */
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dev->CTRLB.reg |= SERCOM_I2CM_CTRLB_CMD(3);
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_syncbusy(dev);
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DEBUG_PUTS("i2c.c: STATUS_ERR_BUSY_OR_BAD_ADDRESS");
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res = -ENXIO;
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}
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/* Check for address response error unless previous error is detected. */
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/* Check for error and ignore bus-error; workaround for BUSSTATE
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* stuck in BUSY */
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if (dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_SB) {
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/* Clear write interrupt flag */
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dev->INTFLAG.reg = SERCOM_I2CM_INTFLAG_SB;
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/* Check arbitration. */
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if (dev->STATUS.reg & SERCOM_I2CM_STATUS_ARBLOST) {
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DEBUG("STATUS_ERR_PACKET_COLLISION\n");
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return -EAGAIN;
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if (IS_ACTIVE(ENABLE_DEBUG) && res) {
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DEBUG("i2c.c: error: res=%d, INTFLAG=0x%04"PRIx16", STATUS=0x%04"PRIx16"\n",
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res, dev->INTFLAG.reg, dev->STATUS.reg);
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}
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if (unblock_bus) {
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_check_and_unblock_bus(dev_id, true);
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}
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/* Check that slave responded with ack. */
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else if (dev->STATUS.reg & SERCOM_I2CM_STATUS_RXNACK) {
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/* Slave busy. Issue ack and stop command. */
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dev->CTRLB.reg |= SERCOM_I2CM_CTRLB_CMD(3);
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DEBUG("STATUS_ERR_BAD_ADDRESS\n");
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return -ENXIO;
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}
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return 0;
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/* Reset flags */
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dev->INTFLAG.reg = SERCOM_I2CM_INTFLAG_MB & SERCOM_I2CM_INTFLAG_SB &
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SERCOM_I2CM_INTFLAG_ERROR;
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dev->STATUS.reg &= SERCOM_I2CM_STATUS_LENERR | SERCOM_I2CM_STATUS_SEXTTOUT |
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SERCOM_I2CM_STATUS_MEXTTOUT | SERCOM_I2CM_STATUS_LOWTOUT |
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SERCOM_I2CM_STATUS_ARBLOST | SERCOM_I2CM_STATUS_BUSERR;
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return res;
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}
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static inline int _write(SercomI2cm *dev, const uint8_t *data, size_t length,
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@ -467,13 +605,17 @@ static inline int _wait_for_response(SercomI2cm *dev,
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uint32_t max_timeout_counter)
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{
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uint32_t timeout_counter = 0;
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DEBUG("Wait for response.\n");
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DEBUG_PUTS("i2c.c: Waiting for MB/SB flag or timeout.");
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while (!(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_MB)
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&& !(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_SB)) {
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if (++timeout_counter >= max_timeout_counter) {
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DEBUG("STATUS_ERR_TIMEOUT\n");
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DEBUG("i2c.c: STATUS_ERR_TIMEOUT");
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return -ETIMEDOUT;
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}
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}
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DEBUG("i2c.c: %s on bus\n",
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(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_MB) ? "master" : "slave");
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return 0;
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}
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