diff --git a/cpu/sam0_common/include/periph_cpu_common.h b/cpu/sam0_common/include/periph_cpu_common.h index 2ac09a5053..0ad0faa1f8 100644 --- a/cpu/sam0_common/include/periph_cpu_common.h +++ b/cpu/sam0_common/include/periph_cpu_common.h @@ -779,6 +779,14 @@ typedef struct { #endif } adc_conf_chan_t; +/** + * @brief Compatibility define for muxpos struct member + * Unused on all platforms that have DIFFMODE in CTRLB + */ +#ifndef ADC_INPUTCTRL_DIFFMODE +#define ADC_INPUTCTRL_DIFFMODE (1 << 7) +#endif + /** * @brief Pin that can be used for external voltage reference A */ diff --git a/cpu/sam0_common/periph/adc.c b/cpu/sam0_common/periph/adc.c index cf6871d3e0..69193aa6c9 100644 --- a/cpu/sam0_common/periph/adc.c +++ b/cpu/sam0_common/periph/adc.c @@ -36,6 +36,10 @@ #define ADC_GAIN_FACTOR_DEFAULT (0) #endif +#ifndef ADC_NEG_INPUT + #define ADC_NEG_INPUT (0) +#endif + /* Prototypes */ static void _adc_poweroff(Adc *dev); static void _setup_clock(Adc *dev); @@ -252,9 +256,33 @@ int adc_init(adc_t line) return -1; } +#ifdef ADC0 + const uint8_t adc = adc_channels[line].dev == ADC1 ? 1 : 0; +#else + const uint8_t adc = 0; +#endif + _prep(); - gpio_init(adc_channels[line].pin, GPIO_IN); - gpio_init_mux(adc_channels[line].pin, GPIO_MUX_B); + + uint8_t muxpos = (adc_channels[line].muxpos & ADC_INPUTCTRL_MUXPOS_Msk) + >> ADC_INPUTCTRL_MUXPOS_Pos; + uint8_t muxneg = (adc_channels[line].muxpos & ADC_INPUTCTRL_MUXNEG_Msk) + >> ADC_INPUTCTRL_MUXNEG_Pos; + + /* configure positive input pin */ + if (muxpos < 0x18) { + assert(muxpos < ARRAY_SIZE(sam0_adc_pins[adc])); + gpio_init(sam0_adc_pins[adc][muxpos], GPIO_IN); + gpio_init_mux(sam0_adc_pins[adc][muxpos], GPIO_MUX_B); + } + + /* configure negative input pin */ + if (adc_channels[line].muxpos & ADC_INPUTCTRL_DIFFMODE) { + assert(muxneg < ARRAY_SIZE(sam0_adc_pins[adc])); + gpio_init(sam0_adc_pins[adc][muxneg], GPIO_IN); + gpio_init_mux(sam0_adc_pins[adc][muxneg], GPIO_MUX_B); + } + _done(); return 0; @@ -274,6 +302,8 @@ int32_t adc_sample(adc_t line, adc_res_t res) Adc *dev = ADC; #endif + bool diffmode = adc_channels[line].muxpos & ADC_INPUTCTRL_DIFFMODE; + _prep(); if (_adc_configure(dev, res) != 0) { @@ -283,8 +313,12 @@ int32_t adc_sample(adc_t line, adc_res_t res) } dev->INPUTCTRL.reg = ADC_GAIN_FACTOR_DEFAULT - | adc_channels[line].muxpos - | ADC_NEG_INPUT; + | adc_channels[line].muxpos + | (diffmode ? 0 : ADC_NEG_INPUT); +#ifdef ADC_CTRLB_DIFFMODE + dev->CTRLB.bit.DIFFMODE = diffmode; +#endif + _wait_syncbusy(dev); /* Start the conversion */ @@ -293,10 +327,15 @@ int32_t adc_sample(adc_t line, adc_res_t res) /* Wait for the result */ while (!(dev->INTFLAG.reg & ADC_INTFLAG_RESRDY)) {} - int result = dev->RESULT.reg; + int16_t result = dev->RESULT.reg; _adc_poweroff(dev); _done(); + /* in differential mode we lose one bit for the sign */ + if (diffmode) { + result *= 2; + } + return result; } diff --git a/cpu/samd21/include/periph_cpu.h b/cpu/samd21/include/periph_cpu.h index f16e19074a..3ae48378a5 100644 --- a/cpu/samd21/include/periph_cpu.h +++ b/cpu/samd21/include/periph_cpu.h @@ -97,6 +97,54 @@ typedef enum { } adc_res_t; #endif /* ndef DOXYGEN */ +/** + * @brief Pins that can be used for ADC input + */ +static const gpio_t sam0_adc_pins[1][20] = { + { + GPIO_PIN(PA, 2), GPIO_PIN(PA, 3), GPIO_PIN(PB, 8), GPIO_PIN(PB, 9), + GPIO_PIN(PA, 4), GPIO_PIN(PA, 5), GPIO_PIN(PA, 6), GPIO_PIN(PA, 7), + GPIO_PIN(PB, 0), GPIO_PIN(PB, 1), GPIO_PIN(PB, 2), GPIO_PIN(PB, 3), + GPIO_PIN(PB, 4), GPIO_PIN(PB, 5), GPIO_PIN(PB, 6), GPIO_PIN(PB, 7), + GPIO_PIN(PA, 8), GPIO_PIN(PA, 9), GPIO_PIN(PA, 10), GPIO_PIN(PA, 11), + } +}; + +/** + * @brief ADC pin aliases + * @{ + */ +#define ADC_INPUTCTRL_MUXPOS_PA02 ADC_INPUTCTRL_MUXPOS_PIN0 /**< Alias for PIN0 */ +#define ADC_INPUTCTRL_MUXPOS_PA03 ADC_INPUTCTRL_MUXPOS_PIN1 /**< Alias for PIN1 */ +#define ADC_INPUTCTRL_MUXPOS_PB08 ADC_INPUTCTRL_MUXPOS_PIN2 /**< Alias for PIN2 */ +#define ADC_INPUTCTRL_MUXPOS_PB09 ADC_INPUTCTRL_MUXPOS_PIN3 /**< Alias for PIN3 */ +#define ADC_INPUTCTRL_MUXPOS_PA04 ADC_INPUTCTRL_MUXPOS_PIN4 /**< Alias for PIN4 */ +#define ADC_INPUTCTRL_MUXPOS_PA05 ADC_INPUTCTRL_MUXPOS_PIN5 /**< Alias for PIN5 */ +#define ADC_INPUTCTRL_MUXPOS_PA06 ADC_INPUTCTRL_MUXPOS_PIN6 /**< Alias for PIN6 */ +#define ADC_INPUTCTRL_MUXPOS_PA07 ADC_INPUTCTRL_MUXPOS_PIN7 /**< Alias for PIN7 */ +#define ADC_INPUTCTRL_MUXPOS_PB00 ADC_INPUTCTRL_MUXPOS_PIN8 /**< Alias for PIN8 */ +#define ADC_INPUTCTRL_MUXPOS_PB01 ADC_INPUTCTRL_MUXPOS_PIN9 /**< Alias for PIN9 */ +#define ADC_INPUTCTRL_MUXPOS_PB02 ADC_INPUTCTRL_MUXPOS_PIN10 /**< Alias for PIN10 */ +#define ADC_INPUTCTRL_MUXPOS_PB03 ADC_INPUTCTRL_MUXPOS_PIN11 /**< Alias for PIN11 */ +#define ADC_INPUTCTRL_MUXPOS_PB04 ADC_INPUTCTRL_MUXPOS_PIN12 /**< Alias for PIN12 */ +#define ADC_INPUTCTRL_MUXPOS_PB05 ADC_INPUTCTRL_MUXPOS_PIN13 /**< Alias for PIN13 */ +#define ADC_INPUTCTRL_MUXPOS_PB06 ADC_INPUTCTRL_MUXPOS_PIN14 /**< Alias for PIN14 */ +#define ADC_INPUTCTRL_MUXPOS_PB07 ADC_INPUTCTRL_MUXPOS_PIN15 /**< Alias for PIN15 */ +#define ADC_INPUTCTRL_MUXPOS_PA08 ADC_INPUTCTRL_MUXPOS_PIN16 /**< Alias for PIN16 */ +#define ADC_INPUTCTRL_MUXPOS_PA09 ADC_INPUTCTRL_MUXPOS_PIN17 /**< Alias for PIN17 */ +#define ADC_INPUTCTRL_MUXPOS_PA10 ADC_INPUTCTRL_MUXPOS_PIN18 /**< Alias for PIN18 */ +#define ADC_INPUTCTRL_MUXPOS_PA11 ADC_INPUTCTRL_MUXPOS_PIN19 /**< Alias for PIN19 */ + +#define ADC_INPUTCTRL_MUXNEG_PA02 ADC_INPUTCTRL_MUXPOS_PIN0 /**< Alias for PIN0 */ +#define ADC_INPUTCTRL_MUXNEG_PA03 ADC_INPUTCTRL_MUXPOS_PIN1 /**< Alias for PIN1 */ +#define ADC_INPUTCTRL_MUXNEG_PB08 ADC_INPUTCTRL_MUXPOS_PIN2 /**< Alias for PIN2 */ +#define ADC_INPUTCTRL_MUXNEG_PB09 ADC_INPUTCTRL_MUXPOS_PIN3 /**< Alias for PIN3 */ +#define ADC_INPUTCTRL_MUXNEG_PA04 ADC_INPUTCTRL_MUXPOS_PIN4 /**< Alias for PIN4 */ +#define ADC_INPUTCTRL_MUXNEG_PA05 ADC_INPUTCTRL_MUXPOS_PIN5 /**< Alias for PIN5 */ +#define ADC_INPUTCTRL_MUXNEG_PA06 ADC_INPUTCTRL_MUXPOS_PIN6 /**< Alias for PIN6 */ +#define ADC_INPUTCTRL_MUXNEG_PA07 ADC_INPUTCTRL_MUXPOS_PIN7 /**< Alias for PIN7 */ +/** @} */ + /** * @brief The MCU has a 10 bit DAC */ diff --git a/cpu/samd5x/include/periph_cpu.h b/cpu/samd5x/include/periph_cpu.h index e6b20233e7..3607eb0f46 100644 --- a/cpu/samd5x/include/periph_cpu.h +++ b/cpu/samd5x/include/periph_cpu.h @@ -95,6 +95,81 @@ typedef enum { } adc_res_t; #endif /* DOXYGEN */ +/** + * @brief Pins that can be used for ADC input + */ +static const gpio_t sam0_adc_pins[2][16] = { + { /* ADC0 pins */ + GPIO_PIN(PA, 2), GPIO_PIN(PA, 3), GPIO_PIN(PB, 8), GPIO_PIN(PB, 9), + GPIO_PIN(PA, 4), GPIO_PIN(PA, 5), GPIO_PIN(PA, 6), GPIO_PIN(PA, 7), + GPIO_PIN(PA, 8), GPIO_PIN(PA, 9), GPIO_PIN(PA, 10), GPIO_PIN(PA, 11), + GPIO_PIN(PB, 0), GPIO_PIN(PB, 1), GPIO_PIN(PB, 2), GPIO_PIN(PB, 3) + }, + { /* ADC1 pins */ + GPIO_PIN(PB, 8), GPIO_PIN(PB, 9), GPIO_PIN(PA, 8), GPIO_PIN(PA, 9), + GPIO_PIN(PC, 2), GPIO_PIN(PC, 3), GPIO_PIN(PB, 4), GPIO_PIN(PB, 5), + GPIO_PIN(PB, 6), GPIO_PIN(PB, 7), GPIO_PIN(PC, 0), GPIO_PIN(PC, 1), + GPIO_PIN(PC, 30), GPIO_PIN(PC, 31), GPIO_PIN(PD, 0), GPIO_PIN(PD, 1) + } +}; + +/** + * @brief ADC pin aliases + * @{ + */ +#define ADC0_INPUTCTRL_MUXPOS_PA02 ADC_INPUTCTRL_MUXPOS_AIN0 /**< Alias for AIN0 */ +#define ADC0_INPUTCTRL_MUXPOS_PA03 ADC_INPUTCTRL_MUXPOS_AIN1 /**< Alias for AIN1 */ +#define ADC0_INPUTCTRL_MUXPOS_PB08 ADC_INPUTCTRL_MUXPOS_AIN2 /**< Alias for AIN2 */ +#define ADC0_INPUTCTRL_MUXPOS_PB09 ADC_INPUTCTRL_MUXPOS_AIN3 /**< Alias for AIN3 */ +#define ADC0_INPUTCTRL_MUXPOS_PA04 ADC_INPUTCTRL_MUXPOS_AIN4 /**< Alias for AIN4 */ +#define ADC0_INPUTCTRL_MUXPOS_PA05 ADC_INPUTCTRL_MUXPOS_AIN5 /**< Alias for AIN5 */ +#define ADC0_INPUTCTRL_MUXPOS_PA06 ADC_INPUTCTRL_MUXPOS_AIN6 /**< Alias for AIN6 */ +#define ADC0_INPUTCTRL_MUXPOS_PA07 ADC_INPUTCTRL_MUXPOS_AIN7 /**< Alias for AIN7 */ +#define ADC0_INPUTCTRL_MUXPOS_PA08 ADC_INPUTCTRL_MUXPOS_AIN8 /**< Alias for AIN8 */ +#define ADC0_INPUTCTRL_MUXPOS_PA09 ADC_INPUTCTRL_MUXPOS_AIN9 /**< Alias for AIN9 */ +#define ADC0_INPUTCTRL_MUXPOS_PA10 ADC_INPUTCTRL_MUXPOS_AIN10 /**< Alias for AIN10 */ +#define ADC0_INPUTCTRL_MUXPOS_PA11 ADC_INPUTCTRL_MUXPOS_AIN11 /**< Alias for AIN11 */ +#define ADC0_INPUTCTRL_MUXPOS_PB00 ADC_INPUTCTRL_MUXPOS_AIN12 /**< Alias for AIN12 */ +#define ADC0_INPUTCTRL_MUXPOS_PB01 ADC_INPUTCTRL_MUXPOS_AIN13 /**< Alias for AIN13 */ +#define ADC0_INPUTCTRL_MUXPOS_PB02 ADC_INPUTCTRL_MUXPOS_AIN14 /**< Alias for AIN14 */ +#define ADC0_INPUTCTRL_MUXPOS_PB03 ADC_INPUTCTRL_MUXPOS_AIN15 /**< Alias for AIN15 */ + +#define ADC1_INPUTCTRL_MUXPOS_PB08 ADC_INPUTCTRL_MUXPOS_AIN0 /**< Alias for AIN0 */ +#define ADC1_INPUTCTRL_MUXPOS_PB09 ADC_INPUTCTRL_MUXPOS_AIN1 /**< Alias for AIN1 */ +#define ADC1_INPUTCTRL_MUXPOS_PA08 ADC_INPUTCTRL_MUXPOS_AIN2 /**< Alias for AIN2 */ +#define ADC1_INPUTCTRL_MUXPOS_PA09 ADC_INPUTCTRL_MUXPOS_AIN3 /**< Alias for AIN3 */ +#define ADC1_INPUTCTRL_MUXPOS_PC02 ADC_INPUTCTRL_MUXPOS_AIN4 /**< Alias for AIN4 */ +#define ADC1_INPUTCTRL_MUXPOS_PC03 ADC_INPUTCTRL_MUXPOS_AIN5 /**< Alias for AIN5 */ +#define ADC1_INPUTCTRL_MUXPOS_PB04 ADC_INPUTCTRL_MUXPOS_AIN6 /**< Alias for AIN6 */ +#define ADC1_INPUTCTRL_MUXPOS_PB05 ADC_INPUTCTRL_MUXPOS_AIN7 /**< Alias for AIN7 */ +#define ADC1_INPUTCTRL_MUXPOS_PB06 ADC_INPUTCTRL_MUXPOS_AIN8 /**< Alias for AIN8 */ +#define ADC1_INPUTCTRL_MUXPOS_PB07 ADC_INPUTCTRL_MUXPOS_AIN9 /**< Alias for AIN9 */ +#define ADC1_INPUTCTRL_MUXPOS_PC00 ADC_INPUTCTRL_MUXPOS_AIN10 /**< Alias for AIN10 */ +#define ADC1_INPUTCTRL_MUXPOS_PC01 ADC_INPUTCTRL_MUXPOS_AIN11 /**< Alias for AIN11 */ +#define ADC1_INPUTCTRL_MUXPOS_PC30 ADC_INPUTCTRL_MUXPOS_AIN12 /**< Alias for AIN12 */ +#define ADC1_INPUTCTRL_MUXPOS_PC31 ADC_INPUTCTRL_MUXPOS_AIN13 /**< Alias for AIN13 */ +#define ADC1_INPUTCTRL_MUXPOS_PD00 ADC_INPUTCTRL_MUXPOS_AIN14 /**< Alias for AIN14 */ +#define ADC1_INPUTCTRL_MUXPOS_PD01 ADC_INPUTCTRL_MUXPOS_AIN15 /**< Alias for AIN15 */ + +#define ADC0_INPUTCTRL_MUXNEG_PA02 ADC_INPUTCTRL_MUXPOS_AIN0 /**< Alias for AIN0 */ +#define ADC0_INPUTCTRL_MUXNEG_PA03 ADC_INPUTCTRL_MUXPOS_AIN1 /**< Alias for AIN1 */ +#define ADC0_INPUTCTRL_MUXNEG_PB08 ADC_INPUTCTRL_MUXPOS_AIN2 /**< Alias for AIN2 */ +#define ADC0_INPUTCTRL_MUXNEG_PB09 ADC_INPUTCTRL_MUXPOS_AIN3 /**< Alias for AIN3 */ +#define ADC0_INPUTCTRL_MUXNEG_PA04 ADC_INPUTCTRL_MUXPOS_AIN4 /**< Alias for AIN4 */ +#define ADC0_INPUTCTRL_MUXNEG_PA05 ADC_INPUTCTRL_MUXPOS_AIN5 /**< Alias for AIN5 */ +#define ADC0_INPUTCTRL_MUXNEG_PA06 ADC_INPUTCTRL_MUXPOS_AIN6 /**< Alias for AIN6 */ +#define ADC0_INPUTCTRL_MUXNEG_PA07 ADC_INPUTCTRL_MUXPOS_AIN7 /**< Alias for AIN7 */ + +#define ADC1_INPUTCTRL_MUXNEG_PB08 ADC_INPUTCTRL_MUXPOS_AIN0 /**< Alias for AIN0 */ +#define ADC1_INPUTCTRL_MUXNEG_PB09 ADC_INPUTCTRL_MUXPOS_AIN1 /**< Alias for AIN1 */ +#define ADC1_INPUTCTRL_MUXNEG_PA08 ADC_INPUTCTRL_MUXPOS_AIN2 /**< Alias for AIN2 */ +#define ADC1_INPUTCTRL_MUXNEG_PA09 ADC_INPUTCTRL_MUXPOS_AIN3 /**< Alias for AIN3 */ +#define ADC1_INPUTCTRL_MUXNEG_PC02 ADC_INPUTCTRL_MUXPOS_AIN4 /**< Alias for AIN4 */ +#define ADC1_INPUTCTRL_MUXNEG_PC03 ADC_INPUTCTRL_MUXPOS_AIN5 /**< Alias for AIN5 */ +#define ADC1_INPUTCTRL_MUXNEG_PB04 ADC_INPUTCTRL_MUXPOS_AIN6 /**< Alias for AIN6 */ +#define ADC1_INPUTCTRL_MUXNEG_PB05 ADC_INPUTCTRL_MUXPOS_AIN7 /**< Alias for AIN7 */ +/** @} */ + /** * @brief The MCU has a 12 bit DAC */ diff --git a/cpu/saml1x/include/periph_cpu.h b/cpu/saml1x/include/periph_cpu.h index 63fcb309e7..ced0503b3a 100644 --- a/cpu/saml1x/include/periph_cpu.h +++ b/cpu/saml1x/include/periph_cpu.h @@ -55,6 +55,42 @@ typedef enum { } adc_res_t; #endif /* ndef DOXYGEN */ +/** + * @brief Pins that can be used for ADC input + */ +static const gpio_t sam0_adc_pins[1][10] = { + { + GPIO_PIN(PA, 2), GPIO_PIN(PA, 3), GPIO_PIN(PA, 4), GPIO_PIN(PA, 5), + GPIO_PIN(PA, 6), GPIO_PIN(PA, 7), GPIO_PIN(PA, 8), GPIO_PIN(PA, 9), + GPIO_PIN(PA, 10), GPIO_PIN(PA, 11) + } +}; + +/** + * @brief ADC pin aliases + * @{ + */ +#define ADC_INPUTCTRL_MUXPOS_PA02 ADC_INPUTCTRL_MUXPOS_AIN0 /**< Alias for AIN0 */ +#define ADC_INPUTCTRL_MUXPOS_PA03 ADC_INPUTCTRL_MUXPOS_AIN1 /**< Alias for AIN1 */ +#define ADC_INPUTCTRL_MUXPOS_PA04 ADC_INPUTCTRL_MUXPOS_AIN2 /**< Alias for AIN2 */ +#define ADC_INPUTCTRL_MUXPOS_PA05 ADC_INPUTCTRL_MUXPOS_AIN3 /**< Alias for AIN3 */ +#define ADC_INPUTCTRL_MUXPOS_PA06 ADC_INPUTCTRL_MUXPOS_AIN4 /**< Alias for AIN4 */ +#define ADC_INPUTCTRL_MUXPOS_PA07 ADC_INPUTCTRL_MUXPOS_AIN5 /**< Alias for AIN5 */ +#define ADC_INPUTCTRL_MUXPOS_PA08 ADC_INPUTCTRL_MUXPOS_AIN6 /**< Alias for AIN6 */ +#define ADC_INPUTCTRL_MUXPOS_PA09 ADC_INPUTCTRL_MUXPOS_AIN7 /**< Alias for AIN7 */ +#define ADC_INPUTCTRL_MUXPOS_PA10 ADC_INPUTCTRL_MUXPOS_AIN8 /**< Alias for AIN8 */ +#define ADC_INPUTCTRL_MUXPOS_PA11 ADC_INPUTCTRL_MUXPOS_AIN9 /**< Alias for AIN9 */ + +#define ADC_INPUTCTRL_MUXNEG_PA02 ADC_INPUTCTRL_MUXPOS_AIN0 /**< Alias for AIN0 */ +#define ADC_INPUTCTRL_MUXNEG_PA03 ADC_INPUTCTRL_MUXPOS_AIN1 /**< Alias for AIN1 */ +#define ADC_INPUTCTRL_MUXNEG_PA04 ADC_INPUTCTRL_MUXPOS_AIN2 /**< Alias for AIN2 */ +#define ADC_INPUTCTRL_MUXNEG_PA05 ADC_INPUTCTRL_MUXPOS_AIN3 /**< Alias for AIN3 */ +#define ADC_INPUTCTRL_MUXNEG_PA06 ADC_INPUTCTRL_MUXPOS_AIN4 /**< Alias for AIN4 */ +#define ADC_INPUTCTRL_MUXNEG_PA07 ADC_INPUTCTRL_MUXPOS_AIN5 /**< Alias for AIN5 */ +#define ADC_INPUTCTRL_MUXNEG_PA08 ADC_INPUTCTRL_MUXPOS_AIN6 /**< Alias for AIN6 */ +#define ADC_INPUTCTRL_MUXNEG_PA09 ADC_INPUTCTRL_MUXPOS_AIN7 /**< Alias for AIN7 */ +/** @} */ + /** * @brief The MCU has a 10 bit DAC */ diff --git a/cpu/saml21/include/periph_cpu.h b/cpu/saml21/include/periph_cpu.h index 2bedb6dd34..eb965e4089 100644 --- a/cpu/saml21/include/periph_cpu.h +++ b/cpu/saml21/include/periph_cpu.h @@ -62,6 +62,54 @@ typedef enum { } adc_res_t; #endif /* ndef DOXYGEN */ +/** + * @brief Pins that can be used for ADC input + */ +static const gpio_t sam0_adc_pins[1][20] = { + { + GPIO_PIN(PA, 2), GPIO_PIN(PA, 3), GPIO_PIN(PB, 8), GPIO_PIN(PB, 9), + GPIO_PIN(PA, 4), GPIO_PIN(PA, 5), GPIO_PIN(PA, 6), GPIO_PIN(PA, 7), + GPIO_PIN(PB, 0), GPIO_PIN(PB, 1), GPIO_PIN(PB, 2), GPIO_PIN(PB, 3), + GPIO_PIN(PB, 4), GPIO_PIN(PB, 5), GPIO_PIN(PB, 6), GPIO_PIN(PB, 7), + GPIO_PIN(PA, 8), GPIO_PIN(PA, 9), GPIO_PIN(PA, 10), GPIO_PIN(PA, 11), + } +}; + +/** + * @brief ADC pin aliases + * @{ + */ +#define ADC_INPUTCTRL_MUXPOS_PA02 ADC_INPUTCTRL_MUXPOS_AIN0 /**< Alias for AIN0 */ +#define ADC_INPUTCTRL_MUXPOS_PA03 ADC_INPUTCTRL_MUXPOS_AIN1 /**< Alias for AIN1 */ +#define ADC_INPUTCTRL_MUXPOS_PB08 ADC_INPUTCTRL_MUXPOS_AIN2 /**< Alias for AIN2 */ +#define ADC_INPUTCTRL_MUXPOS_PB09 ADC_INPUTCTRL_MUXPOS_AIN3 /**< Alias for AIN3 */ +#define ADC_INPUTCTRL_MUXPOS_PA04 ADC_INPUTCTRL_MUXPOS_AIN4 /**< Alias for AIN4 */ +#define ADC_INPUTCTRL_MUXPOS_PA05 ADC_INPUTCTRL_MUXPOS_AIN5 /**< Alias for AIN5 */ +#define ADC_INPUTCTRL_MUXPOS_PA06 ADC_INPUTCTRL_MUXPOS_AIN6 /**< Alias for AIN6 */ +#define ADC_INPUTCTRL_MUXPOS_PA07 ADC_INPUTCTRL_MUXPOS_AIN7 /**< Alias for AIN7 */ +#define ADC_INPUTCTRL_MUXPOS_PB00 ADC_INPUTCTRL_MUXPOS_AIN8 /**< Alias for AIN8 */ +#define ADC_INPUTCTRL_MUXPOS_PB01 ADC_INPUTCTRL_MUXPOS_AIN9 /**< Alias for AIN9 */ +#define ADC_INPUTCTRL_MUXPOS_PB02 ADC_INPUTCTRL_MUXPOS_AIN10 /**< Alias for AIN10 */ +#define ADC_INPUTCTRL_MUXPOS_PB03 ADC_INPUTCTRL_MUXPOS_AIN11 /**< Alias for AIN11 */ +#define ADC_INPUTCTRL_MUXPOS_PB04 ADC_INPUTCTRL_MUXPOS_AIN12 /**< Alias for AIN12 */ +#define ADC_INPUTCTRL_MUXPOS_PB05 ADC_INPUTCTRL_MUXPOS_AIN13 /**< Alias for AIN13 */ +#define ADC_INPUTCTRL_MUXPOS_PB06 ADC_INPUTCTRL_MUXPOS_AIN14 /**< Alias for AIN14 */ +#define ADC_INPUTCTRL_MUXPOS_PB07 ADC_INPUTCTRL_MUXPOS_AIN15 /**< Alias for AIN15 */ +#define ADC_INPUTCTRL_MUXPOS_PA08 ADC_INPUTCTRL_MUXPOS_AIN16 /**< Alias for AIN16 */ +#define ADC_INPUTCTRL_MUXPOS_PA09 ADC_INPUTCTRL_MUXPOS_AIN17 /**< Alias for AIN17 */ +#define ADC_INPUTCTRL_MUXPOS_PA10 ADC_INPUTCTRL_MUXPOS_AIN18 /**< Alias for AIN18 */ +#define ADC_INPUTCTRL_MUXPOS_PA11 ADC_INPUTCTRL_MUXPOS_AIN19 /**< Alias for AIN19 */ + +#define ADC_INPUTCTRL_MUXNEG_PA02 ADC_INPUTCTRL_MUXPOS_AIN0 /**< Alias for AIN0 */ +#define ADC_INPUTCTRL_MUXNEG_PA03 ADC_INPUTCTRL_MUXPOS_AIN1 /**< Alias for AIN1 */ +#define ADC_INPUTCTRL_MUXNEG_PB08 ADC_INPUTCTRL_MUXPOS_AIN2 /**< Alias for AIN2 */ +#define ADC_INPUTCTRL_MUXNEG_PB09 ADC_INPUTCTRL_MUXPOS_AIN3 /**< Alias for AIN3 */ +#define ADC_INPUTCTRL_MUXNEG_PA04 ADC_INPUTCTRL_MUXPOS_AIN4 /**< Alias for AIN4 */ +#define ADC_INPUTCTRL_MUXNEG_PA05 ADC_INPUTCTRL_MUXPOS_AIN5 /**< Alias for AIN5 */ +#define ADC_INPUTCTRL_MUXNEG_PA06 ADC_INPUTCTRL_MUXPOS_AIN6 /**< Alias for AIN6 */ +#define ADC_INPUTCTRL_MUXNEG_PA07 ADC_INPUTCTRL_MUXPOS_AIN7 /**< Alias for AIN7 */ +/** @} */ + /** * @brief The MCU has a 12 bit DAC */