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cpu/samd5x: define GCLK pins
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@ -198,6 +198,28 @@ static const gpio_t rtc_tamper_pins[RTC_NUM_OF_TAMPERS] = {
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GPIO_PIN(PC, 0), GPIO_PIN(PC, 1)
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};
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/**
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* @brief Pins that have peripheral function GCLK
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*/
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static const gpio_t gclk_io_pins[] = {
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GPIO_PIN(PA, 10), GPIO_PIN(PA, 11), GPIO_PIN(PA, 14),
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GPIO_PIN(PA, 15), GPIO_PIN(PA, 16), GPIO_PIN(PA, 17),
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GPIO_PIN(PA, 27), GPIO_PIN(PA, 30), GPIO_PIN(PB, 10),
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GPIO_PIN(PB, 11), GPIO_PIN(PB, 12), GPIO_PIN(PB, 13),
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GPIO_PIN(PB, 14), GPIO_PIN(PB, 15), GPIO_PIN(PB, 16),
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GPIO_PIN(PB, 17), GPIO_PIN(PB, 18), GPIO_PIN(PB, 19),
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GPIO_PIN(PB, 20), GPIO_PIN(PB, 21), GPIO_PIN(PB, 22),
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GPIO_PIN(PB, 23)
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};
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/**
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* @brief GCLK IDs of pins that have peripheral function GCLK - This maps
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* directly to gclk_io_pins.
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*/
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static const uint8_t gclk_io_ids[] = {
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4, 5, 0, 1, 2, 3, 1, 0, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7, 0, 1
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};
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/**
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* @brief NVM User Page Mapping - Dedicated Entries
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* Config values will be applied at power-on.
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