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cpu/esp32: port periph/rtt_hw_sys to ESP-IDF timer HAL

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This commit is contained in:
Gunar Schorcht 2022-06-27 07:31:26 +02:00
parent 5261a930bb
commit ae48cfca33
1 changed files with 39 additions and 32 deletions
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71
cpu/esp32/periph/rtt_hw_sys.c
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@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2020 Gunar Schorcht * Copyright (C) 2022 Gunar Schorcht
* *
* This file is subject to the terms and conditions of the GNU Lesser * This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level * General Public License v2.1. See the file LICENSE in the top level
@ -32,20 +32,28 @@
/* ESP-IDF headers */ /* ESP-IDF headers */
#include "esp_attr.h" #include "esp_attr.h"
#include "esp_sleep.h" #include "esp_sleep.h"
#include "hal/interrupt_controller_types.h"
#include "hal/interrupt_controller_ll.h"
#include "hal/timer_hal.h"
#include "rom/ets_sys.h" #include "rom/ets_sys.h"
#include "soc/periph_defs.h"
#include "soc/timer_group_struct.h" #include "soc/timer_group_struct.h"
#if __xtensa__
#include "xtensa/xtensa_api.h" #include "xtensa/xtensa_api.h"
#endif
#define ENABLE_DEBUG 0 #define ENABLE_DEBUG 0
#include "debug.h" #include "debug.h"
#define TIMER_SYSTEM_GROUP TIMERG0 #define TIMER_SYSTEM_INT_MASK BIT(TIMER_SYSTEM_INDEX)
#define TIMER_SYSTEM_INT_MASK BIT(0)
#define TIMER_SYSTEM_INT_SRC ETS_TG0_T0_LEVEL_INTR_SOURCE
#define SYS_US_TO_TICKS(us) ((((uint64_t)us) << 15) / US_PER_SEC) #define SYS_US_TO_TICKS(us) ((((uint64_t)us) << 15) / US_PER_SEC)
#define SYS_TICKS_TO_US(cnt) (((uint64_t)cnt * US_PER_SEC) >> 15) #define SYS_TICKS_TO_US(cnt) (((uint64_t)cnt * US_PER_SEC) >> 15)
/* system timer is defined and initialized in syscalls.c */
extern timer_hal_context_t sys_timer;
typedef struct { typedef struct {
uint32_t alarm_set; /**< alarm set at interface */ uint32_t alarm_set; /**< alarm set at interface */
rtt_cb_t alarm_cb; /**< alarm callback */ rtt_cb_t alarm_cb; /**< alarm callback */
@ -77,15 +85,15 @@ static void _sys_poweron(void)
intr_matrix_set(PRO_CPU_NUM, TIMER_SYSTEM_INT_SRC, CPU_INUM_RTT); intr_matrix_set(PRO_CPU_NUM, TIMER_SYSTEM_INT_SRC, CPU_INUM_RTT);
/* set interrupt handler and enable the CPU interrupt */ /* set interrupt handler and enable the CPU interrupt */
xt_set_interrupt_handler(CPU_INUM_RTT, _sys_isr, NULL); intr_cntrl_ll_set_int_handler(CPU_INUM_RTT, _sys_isr, NULL);
xt_ints_on(BIT(CPU_INUM_RTT)); intr_cntrl_ll_enable_interrupts(BIT(CPU_INUM_RTT));
} }
static void _sys_poweroff(void) static void _sys_poweroff(void)
{ {
/* reset interrupt handler and disable the CPU interrupt */ /* reset interrupt handler and disable the CPU interrupt */
xt_ints_off(BIT(CPU_INUM_RTT)); intr_cntrl_ll_disable_interrupts(BIT(CPU_INUM_RTT));
xt_set_interrupt_handler(CPU_INUM_RTT, NULL, NULL); intr_cntrl_ll_set_int_handler(CPU_INUM_RTT, NULL, NULL);
} }
static uint64_t _sys_get_counter(void) static uint64_t _sys_get_counter(void)
@ -108,8 +116,8 @@ static void _sys_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)
uint64_t _sys_time = system_get_time_64(); uint64_t _sys_time = system_get_time_64();
uint64_t _sys_alarm_time = _sys_time + _sys_diff; uint64_t _sys_alarm_time = _sys_time + _sys_diff;
DEBUG("%s alarm=%u rtt_diff=%u " DEBUG("%s alarm=%" PRIu32 " rtt_diff=%" PRIu32 " "
"sys_diff=%llu sys_alarm=%llu @sys_time=%llu\n", __func__, "sys_diff=%" PRIu64 " sys_alarm=%" PRIu64 " @sys_time=%" PRIu64 "\n", __func__,
alarm, rtt_diff, _sys_diff, _sys_alarm_time, _sys_time); alarm, rtt_diff, _sys_diff, _sys_alarm_time, _sys_time);
/* save the alarm configuration for interrupt handling */ /* save the alarm configuration for interrupt handling */
@ -118,27 +126,24 @@ static void _sys_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)
_sys_alarm.alarm_arg = arg; _sys_alarm.alarm_arg = arg;
/* set the timer value */ /* set the timer value */
TIMER_SYSTEM.alarm_high = (uint32_t)(_sys_alarm_time >> 32); timer_hal_set_alarm_value(&sys_timer, _sys_alarm_time);
TIMER_SYSTEM.alarm_low = (uint32_t)(_sys_alarm_time & 0xffffffff);
/* clear the bit in status and set the bit in interrupt enable */ /* clear the bit in status and set the bit in interrupt enable */
TIMER_SYSTEM_GROUP.int_clr_timers.val |= TIMER_SYSTEM_INT_MASK; timer_hal_clear_intr_status(&sys_timer);
TIMER_SYSTEM_GROUP.int_ena.val |= TIMER_SYSTEM_INT_MASK; timer_hal_intr_enable(&sys_timer);
/* enable the timer alarm */ /* enable the timer alarm */
TIMER_SYSTEM.config.level_int_en = 1; timer_hal_set_alarm_enable(&sys_timer, true);
TIMER_SYSTEM.config.alarm_en = 1;
} }
static void _sys_clear_alarm(void) static void _sys_clear_alarm(void)
{ {
/* disable alarms first */ /* disable alarms first */
TIMER_SYSTEM.config.level_int_en = 0; timer_hal_intr_disable(&sys_timer);
TIMER_SYSTEM.config.alarm_en = 0; timer_hal_set_alarm_enable(&sys_timer, false);
/* clear the bit in interrupt enable and status register */ /* clear the bit in interrupt status register */
TIMER_SYSTEM_GROUP.int_ena.val &= ~TIMER_SYSTEM_INT_MASK; timer_hal_clear_intr_status(&sys_timer);
TIMER_SYSTEM_GROUP.int_clr_timers.val |= TIMER_SYSTEM_INT_MASK;
/* reset the alarm configuration for interrupt handling */ /* reset the alarm configuration for interrupt handling */
_sys_alarm.alarm_set = 0; _sys_alarm.alarm_set = 0;
@ -156,7 +161,7 @@ static void _sys_save_counter(void)
critical_exit(); critical_exit();
DEBUG("%s rtc_time_saved=%llu sys_time_saved=%llu\n", __func__, DEBUG("%s rtc_time_saved=%" PRIu64 " sys_time_saved=%" PRIu64 "\n", __func__,
_rtc_counter_saved, _sys_counter_saved); _rtc_counter_saved, _sys_counter_saved);
} }
@ -171,34 +176,36 @@ static void _sys_restore_counter(bool in_init)
critical_exit(); critical_exit();
DEBUG("%s rtc_time_saved=%llu rtc_time_diff=%llu " DEBUG("%s rtc_time_saved=%" PRIu64 " rtc_time_diff=%" PRIu64 " "
"sys_time_saved=%llu sys_time_offset=%llu\n", __func__, "sys_time_saved=%" PRIu64 " sys_time_offset=%" PRIu64 "\n", __func__,
_rtc_counter_saved, _rtc_time_diff, _rtc_counter_saved, _rtc_time_diff,
_sys_counter_saved, _sys_counter_offset); _sys_counter_saved, _sys_counter_offset);
} }
static void IRAM _sys_isr(void *arg) static void IRAM _sys_isr(void *arg)
{ {
if (!(TIMER_SYSTEM_GROUP.int_st_timers.val & TIMER_SYSTEM_INT_MASK)) { uint32_t int_status;
timer_hal_get_intr_status(&sys_timer, &int_status);
if (!(int_status & TIMER_SYSTEM_INT_MASK)) {
/* return in case of another timer interrupt */ /* return in case of another timer interrupt */
return; return;
} }
/* disable alarms first */ /* disable alarms first */
TIMER_SYSTEM.config.level_int_en = 0; timer_hal_intr_disable(&sys_timer);
TIMER_SYSTEM.config.alarm_en = 0; timer_hal_set_alarm_enable(&sys_timer, false);
/* clear the bit in interrupt enable and status register */ /* clear the bit in interrupt status register */
TIMER_SYSTEM_GROUP.int_ena.val &= ~TIMER_SYSTEM_INT_MASK; timer_hal_clear_intr_status(&sys_timer);
TIMER_SYSTEM_GROUP.int_clr_timers.val |= TIMER_SYSTEM_INT_MASK;
/* save the lower 32 bit of the current counter value */ /* save the lower 32 bit of the current counter value */
uint32_t counter = _sys_get_counter(); uint32_t counter = _sys_get_counter();
DEBUG("%s %u\n", __func__, counter); DEBUG("%s %" PRIu32 "\n", __func__, counter);
if (_sys_alarm.alarm_cb) { if (_sys_alarm.alarm_cb) {
DEBUG("%s alarm %u\n", __func__, counter); DEBUG("%s alarm %" PRIu32 "\n", __func__, counter);
rtt_cb_t alarm_cb = _sys_alarm.alarm_cb; rtt_cb_t alarm_cb = _sys_alarm.alarm_cb;
void *alarm_arg = _sys_alarm.alarm_arg; void *alarm_arg = _sys_alarm.alarm_arg;