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cpu/stm32f0: Use {} notation for empty while loops
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@ -72,7 +72,7 @@ static void clock_init(void)
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RCC->CR |= RCC_CR_HSEON;
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/* wait for HSE to be ready */
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while (!(RCC->CR & RCC_CR_HSERDY));
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while (!(RCC->CR & RCC_CR_HSERDY)) {}
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/* setup the peripheral bus prescalers */
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@ -92,7 +92,7 @@ static void clock_init(void)
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/* enable PLL again */
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RCC->CR |= RCC_CR_PLLON;
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/* wait until PLL is stable */
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while(!(RCC->CR & RCC_CR_PLLRDY));
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while(!(RCC->CR & RCC_CR_PLLRDY)) {}
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/* configure flash latency */
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@ -106,5 +106,5 @@ static void clock_init(void)
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RCC->CFGR |= RCC_CFGR_SW_PLL;
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/* wait for sysclock to be stable */
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while (!(RCC->CFGR & RCC_CFGR_SWS_PLL));
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while (!(RCC->CFGR & RCC_CFGR_SWS_PLL)) {}
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}
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@ -131,7 +131,7 @@ int adc_sample(adc_t dev, int channel)
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/* start single conversion */
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adc->CR |= ADC_CR_ADSTART;
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/* wait until conversion is complete */
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while (!(adc->ISR & ADC_ISR_EOC));
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while (!(adc->ISR & ADC_ISR_EOC)) {}
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/* read and return result */
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return (int)adc->DR;
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}
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@ -64,7 +64,7 @@ void rtc_init(void)
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RCC->BDCR &= ~(RCC_BDCR_LSEON);
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RCC->BDCR &= ~(RCC_BDCR_LSEBYP);
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RCC->BDCR |= RCC_BDCR_LSEON;
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while ( (RCC->BDCR & RCC_BDCR_LSERDY) == 0 );
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while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0) {}
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/* Switch RTC to LSE clock source */
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RCC->BDCR &= ~(RCC_BDCR_RTCSEL);
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@ -80,7 +80,7 @@ void rtc_init(void)
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/* Enter RTC Init mode */
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RTC->ISR = 0;
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RTC->ISR |= RTC_ISR_INIT;
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while ( (RTC->ISR & RTC_ISR_INITF) == 0 );
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while ((RTC->ISR & RTC_ISR_INITF) == 0) {}
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/* Set 24-h clock */
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RTC->CR |= RTC_CR_FMT;
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@ -111,7 +111,7 @@ int rtc_set_time(struct tm *time)
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/* Enter RTC Init mode */
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RTC->ISR |= RTC_ISR_INIT;
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while ( (RTC->ISR & RTC_ISR_INITF) == 0 );
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while ((RTC->ISR & RTC_ISR_INITF) == 0) {}
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RTC->DR = ( (((uint32_t)byte2bcd(time->tm_year - MCU_YEAR_OFFSET) << 16) & (RTC_DR_YT | RTC_DR_YU) ) |
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@ -155,10 +155,10 @@ int rtc_set_alarm(struct tm *time, rtc_alarm_cb_t cb, void *arg)
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/* Enter RTC Init mode */
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RTC->ISR |= RTC_ISR_INIT;
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while ( (RTC->ISR & RTC_ISR_INITF) == 0 );
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while ((RTC->ISR & RTC_ISR_INITF) == 0) {}
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RTC->CR &= ~(RTC_CR_ALRAE);
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while ( (RTC->ISR & RTC_ISR_ALRAWF) == 0 );
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while ((RTC->ISR & RTC_ISR_ALRAWF) == 0) {}
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RTC->ALRMAR &= ~(RTC_ALRMAR_MSK1 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK4);
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RTC->ALRMAR = ( (((uint32_t)byte2bcd(time->tm_mday) << 24) & (RTC_ALRMAR_DT | RTC_ALRMAR_DU) ) |
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(((uint32_t)byte2bcd(time->tm_hour) << 16) & (RTC_ALRMAR_HT | RTC_ALRMAR_HU) ) |
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@ -251,8 +251,7 @@ static uint8_t byte2bcd(uint8_t value)
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{
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uint8_t bcdhigh = 0;
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while (value >= 10)
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{
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while (value >= 10) {
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bcdhigh++;
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value -= 10;
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}
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@ -199,11 +199,11 @@ int spi_transfer_byte(spi_t dev, char out, char *in)
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}
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/* wait for an eventually previous byte to be readily transferred */
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while(!(spi->SR & SPI_SR_TXE));
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while(!(spi->SR & SPI_SR_TXE)) {}
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/* put next byte into the output register */
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*((volatile uint8_t *)(&spi->DR)) = (uint8_t)out;
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/* wait until the current byte was successfully transferred */
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while(!(spi->SR & SPI_SR_RXNE) );
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while(!(spi->SR & SPI_SR_RXNE)) {}
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/* read response byte to reset flags */
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tmp = *((volatile uint8_t *)(&spi->DR));
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/* 'return' response byte if wished for */
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@ -240,13 +240,13 @@ void spi_poweroff(spi_t dev)
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switch (dev) {
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#if SPI_0_EN
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case SPI_0:
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while (SPI_0_DEV->SR & SPI_SR_BSY);
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while (SPI_0_DEV->SR & SPI_SR_BSY) {}
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SPI_0_CLKDIS();
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break;
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#endif
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#if SPI_1_EN
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case SPI_1:
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while (SPI_1_DEV->SR & SPI_SR_BSY);
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while (SPI_1_DEV->SR & SPI_SR_BSY) {}
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SPI_1_CLKDIS();
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break;
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#endif
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@ -151,7 +151,7 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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USART_TypeDef *dev = uart_port[uart];
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for (size_t i = 0; i < len; i++) {
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while (!(dev->ISR & USART_ISR_TXE));
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while (!(dev->ISR & USART_ISR_TXE)) {}
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dev->TDR = data[i];
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}
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}
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