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Merge pull request #20965 from crasbe/pr/nRF52_pinreset
boards/nrf52*dk: Enable Pinreset after Flashing
This commit is contained in:
commit
ab67824770
@ -1,2 +1,7 @@
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# Set UICR.PSELRESET[0] and UICR.PSELRESET[1] registers at 0x10001200
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# to pin P0.21 (0x15), which is connected to the onboard Reset button
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JLINK_POST_FLASH = Write4 0x10001200 00000015 00000015
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OPENOCD_PRE_VERIFY_CMDS = -c 'flash fillw 0x10001200 0x00000015 2'
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# include common configuration for nrf52 based boards
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# include common configuration for nrf52 based boards
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include $(RIOTBOARD)/common/nrf52/Makefile.include
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include $(RIOTBOARD)/common/nrf52/Makefile.include
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@ -6,4 +6,9 @@ TTY_BOARD_FILTER := --model J-Link
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# the debug adapter
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# the debug adapter
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DEBUG_ADAPTER_ID_IS_TTY_SERIAL := 1
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DEBUG_ADAPTER_ID_IS_TTY_SERIAL := 1
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# Set UICR.PSELRESET[0] and UICR.PSELRESET[1] registers at 0x10001200
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# to pin P0.18 (0x12), which is connected to the onboard Reset button
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JLINK_POST_FLASH = Write4 0x10001200 00000012 00000012
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OPENOCD_PRE_VERIFY_CMDS = -c 'flash fillw 0x10001200 0x00000012 2'
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include $(RIOTBOARD)/common/nrf52xxxdk/Makefile.include
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include $(RIOTBOARD)/common/nrf52xxxdk/Makefile.include
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@ -2,4 +2,9 @@
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# USB serials to only select the UART bridge of integrated J-Link debugger.
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# USB serials to only select the UART bridge of integrated J-Link debugger.
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TTY_BOARD_FILTER := --model J-Link
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TTY_BOARD_FILTER := --model J-Link
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# Set UICR.PSELRESET[0] and UICR.PSELRESET[1] registers at 0x10001200
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# to pin P0.21 (0x15), which is connected to the onboard Reset button
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JLINK_POST_FLASH = Write4 0x10001200 00000015 00000015
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OPENOCD_PRE_VERIFY_CMDS = -c 'flash fillw 0x10001200 0x00000015 2'
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include $(RIOTBOARD)/common/nrf52xxxdk/Makefile.include
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include $(RIOTBOARD)/common/nrf52xxxdk/Makefile.include
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@ -2,5 +2,9 @@
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OPENOCD_DEBUG_ADAPTER ?= dap
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OPENOCD_DEBUG_ADAPTER ?= dap
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PROGRAMMER ?= openocd
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PROGRAMMER ?= openocd
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# Set UICR.PSELRESET[0] and UICR.PSELRESET[1] registers at 0x10001200
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# to pin P0.18 (0x12), which is connected to the onboard Reset button
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OPENOCD_PRE_VERIFY_CMDS = -c 'flash fillw 0x10001200 0x00000012 2'
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# use the common nrf52 config for the rest
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# use the common nrf52 config for the rest
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include $(RIOTBOARD)/common/nrf52/Makefile.include
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include $(RIOTBOARD)/common/nrf52/Makefile.include
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@ -1,3 +1,8 @@
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MODULE = board
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MODULE = board
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# Set UICR.PSELRESET[0] and UICR.PSELRESET[1] registers at 0x10001200
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# to pin P0.18 (0x12), which is connected to the onboard Reset button
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JLINK_POST_FLASH = Write4 0x10001200 00000012 00000012
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OPENOCD_PRE_VERIFY_CMDS = -c 'flash fillw 0x10001200 0x00000012 2'
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include $(RIOTBASE)/Makefile.base
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include $(RIOTBASE)/Makefile.base
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2
dist/tools/buildsystem_sanity_check/check.sh
vendored
2
dist/tools/buildsystem_sanity_check/check.sh
vendored
@ -119,7 +119,7 @@ UNEXPORTED_VARIABLES+=('OPENOCD_PRE_FLASH_CHECK_SCRIPT')
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UNEXPORTED_VARIABLES+=('PYOCD_FLASH_TARGET_TYPE')
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UNEXPORTED_VARIABLES+=('PYOCD_FLASH_TARGET_TYPE')
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UNEXPORTED_VARIABLES+=('PYOCD_ADAPTER_INIT')
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UNEXPORTED_VARIABLES+=('PYOCD_ADAPTER_INIT')
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UNEXPORTED_VARIABLES+=('JLINK_DEVICE' 'JLINK_IF')
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UNEXPORTED_VARIABLES+=('JLINK_DEVICE' 'JLINK_IF')
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UNEXPORTED_VARIABLES+=('JLINK_PRE_FLASH' 'JLINK_RESET_FILE')
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UNEXPORTED_VARIABLES+=('JLINK_PRE_FLASH' 'JLINK_POST_FLASH' 'JLINK_RESET_FILE')
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UNEXPORTED_VARIABLES+=('GIT_CACHE' 'GIT_CACHE_DIR')
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UNEXPORTED_VARIABLES+=('GIT_CACHE' 'GIT_CACHE_DIR')
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UNEXPORTED_VARIABLES+=('LINKXX')
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UNEXPORTED_VARIABLES+=('LINKXX')
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UNEXPORTED_VARIABLES+=('APPDEPS' 'BUILDDEPS' 'DEBUGDEPS')
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UNEXPORTED_VARIABLES+=('APPDEPS' 'BUILDDEPS' 'DEBUGDEPS')
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4
dist/tools/nrf52_resetpin_cfg/README.md
vendored
4
dist/tools/nrf52_resetpin_cfg/README.md
vendored
@ -5,6 +5,10 @@ Simply compile, flash, and run this tool on your nRF52x-based board. It will
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program the given `RESET_PIN` into the NRF_UICR->PSELRESET registers, hence
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program the given `RESET_PIN` into the NRF_UICR->PSELRESET registers, hence
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allowing for hardware resets using a button connected to that pin.
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allowing for hardware resets using a button connected to that pin.
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> [!WARNING]
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> This tool only works with early nRF52 chips with build codes before Fxx.
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> Later build codes automatically erase the UICR register on each flashing
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> operation.
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Context
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Context
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=======
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=======
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