documentation: clean up doxygen mess after cortex

fixes #1190

cpu/cortexm_common/doc.txt

@@ -0,0 +1,40 @@
+/**
+ * @defgroup    cortexm Cortex-M
+ * @brief       ARM Cortex-M specific code
+ * @ingroup     cpu
+ */
+
+/**
+ * @defgroup    CMSIS_Core_FunctionInterface
+ * @ingroup     cortexm
+ */
+
+/**
+ * @defgroup    CMSIS_core_register
+ * @ingroup     cortexm
+ */
+
+/**
+ * @defgroup    CMSIS_glob_defs
+ * @ingroup     cortexm
+ */
+
+/**
+ * @defgroup    CMSIS_MISRA_Exceptions
+ * @ingroup     cortexm
+ */
+
+/**
+ * @defgroup    CMSIS_core_definitions
+ * @ingroup     cortexm
+ */
+
+/**
+ * @defgroup    CMSIS_SIMD_intrinsics
+ * @ingroup     cortexm
+ */
+
+/**
+ * @defgroup    CMSIS_Core_InstructionInterface
+ * @ingroup     cortexm
+ */

cpu/cortexm_common/include/core_cm3.h

@@ -32,7 +32,7 @@
 #define __CORE_CM3_H_GENERIC
 
 
-/** \mainpage CMSIS Cortex-M3
+/** CMSIS Cortex-M3
 
   This documentation describes the CMSIS Cortex-M Core Peripheral Access Layer.
   It consists of:

cpu/sam3x8e/doc.txt

@@ -0,0 +1,10 @@
+/**
+ * @defgroup        cpu_sam3x8e Atmel SAM3X8E
+ * @ingroup         cpu
+ * @brief           Implementation of Atmel's SAM3X8E Cortex-M3 MCU
+ */
+
+/**
+ * @defgroup        cpu_sam3x8e_definitions Atmel SAM3X8E Definitions
+ * @ingroup         cpu_sam3x8e
+ */

cpu/sam3x8e/include/component/doc.txt

@@ -0,0 +1,5 @@
+/**
+ * @defgroup    cpu_sam3x8e_components SAM3XA Components
+ * @brief       SAM3XA Components
+ * @ingroup     cpu_sam3x8e
+ */

cpu/sam3x8e/include/cpu-conf.h

@@ -7,9 +7,6 @@
  */
 
 /**
- * @defgroup        cpu_sam3x8e Atmel SAM3X8E
- * @ingroup         cpu
- * @brief           Implementation of Atmel's SAM3X8E Cortex-M3 MCU
  * @{
  *
  * @file            cpu-conf.h

cpu/sam3x8e/include/sam3x8e.h

@@ -30,7 +30,7 @@
 #ifndef _SAM3X8E_
 #define _SAM3X8E_
 
-/** \addtogroup SAM3X8E_definitions SAM3X8E definitions
+/** \addtogroup cpu_sam3x8e_definitions SAM3X8E definitions
   This file defines all structures and symbols for SAM3X8E:
     - registers and bitfields
     - peripheral base address