From a97e0543cbe1bdfe5961e4a59da7d57321579752 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Sat, 28 Sep 2019 02:55:27 +0200 Subject: [PATCH] boards: add stm32f030f4-demo MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The board is a very cheap (< 1€) breakout board for the stm32f030f4 MCU. --- boards/stm32f030f4-demo/Makefile | 3 + boards/stm32f030f4-demo/Makefile.features | 10 + boards/stm32f030f4-demo/Makefile.include | 18 ++ boards/stm32f030f4-demo/board.c | 30 +++ boards/stm32f030f4-demo/doc.txt | 54 +++++ boards/stm32f030f4-demo/include/board.h | 61 ++++++ boards/stm32f030f4-demo/include/periph_conf.h | 189 ++++++++++++++++++ 7 files changed, 365 insertions(+) create mode 100644 boards/stm32f030f4-demo/Makefile create mode 100644 boards/stm32f030f4-demo/Makefile.features create mode 100644 boards/stm32f030f4-demo/Makefile.include create mode 100644 boards/stm32f030f4-demo/board.c create mode 100644 boards/stm32f030f4-demo/doc.txt create mode 100644 boards/stm32f030f4-demo/include/board.h create mode 100644 boards/stm32f030f4-demo/include/periph_conf.h diff --git a/boards/stm32f030f4-demo/Makefile b/boards/stm32f030f4-demo/Makefile new file mode 100644 index 0000000000..f8fcbb53a0 --- /dev/null +++ b/boards/stm32f030f4-demo/Makefile @@ -0,0 +1,3 @@ +MODULE = board + +include $(RIOTBASE)/Makefile.base diff --git a/boards/stm32f030f4-demo/Makefile.features b/boards/stm32f030f4-demo/Makefile.features new file mode 100644 index 0000000000..06f731e30a --- /dev/null +++ b/boards/stm32f030f4-demo/Makefile.features @@ -0,0 +1,10 @@ +CPU = stm32f0 +CPU_MODEL = stm32f030f4 + +# Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_pwm +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_rtc diff --git a/boards/stm32f030f4-demo/Makefile.include b/boards/stm32f030f4-demo/Makefile.include new file mode 100644 index 0000000000..aa3f38dfad --- /dev/null +++ b/boards/stm32f030f4-demo/Makefile.include @@ -0,0 +1,18 @@ +INCLUDES += -I$(RIOTBOARD)/common/stm32/include + +# configure the serial terminal +PORT_LINUX ?= /dev/ttyACM0 +PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*))) + +# setup serial terminal +include $(RIOTMAKE)/tools/serial.inc.mk + +# stm32 boards can become un-flashable after a hardfault, +# use connect_assert_srst to always be able to flash or reset the boards. +export OPENOCD_RESET_USE_CONNECT_ASSERT_SRST ?= 1 + +# all Nucleo boards have an on-board ST-link adapter +DEBUG_ADAPTER ?= stlink + +# stlink use openocd +include $(RIOTMAKE)/tools/openocd.inc.mk diff --git a/boards/stm32f030f4-demo/board.c b/boards/stm32f030f4-demo/board.c new file mode 100644 index 0000000000..b5f9a9ff08 --- /dev/null +++ b/boards/stm32f030f4-demo/board.c @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2019 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_stm32f030f4-demo + * @{ + * + * @file + * @brief Board initialization code for the stm32f030f4-demo board. + * + * @author Benjamin Valentin + * + * @} + */ + +#include "board.h" +#include "cpu.h" +#include "periph/gpio.h" + +void board_init(void) +{ + cpu_init(); + gpio_init(LED0_PIN, GPIO_OUT); + LED0_OFF; +} diff --git a/boards/stm32f030f4-demo/doc.txt b/boards/stm32f030f4-demo/doc.txt new file mode 100644 index 0000000000..24cd04710d --- /dev/null +++ b/boards/stm32f030f4-demo/doc.txt @@ -0,0 +1,54 @@ +/** +@defgroup boards_stm32f030f4-demo STM32F030F4 Demo Board +@ingroup boards +@brief Support for the STM32F030F4 Demo Board + +## Overview + +The STM32F030F4 Demo Board is a very cheap breakout board for the STM32F030F4 MCU. + +## Hardware + +![STM32F030F4 Demo Board](https://user-images.githubusercontent.com/20950920/48240567-e985c080-e3db-11e8-8775-68a216485b59.jpg) + +### MCU +| MCU | STM32F030R4 | +|:---------- |:--------------------- | +| Family | ARM Cortex-M0 | +| Vendor | ST Microelectronics | +| RAM | 4Kb | +| Flash | 16Kb | +| Frequency | up to 48MHz | +| FPU | no | +| Timers | 8 (2x watchdog, 1 SysTick, 5x 16-bit) | +| ADCs | 1x 12-bit | +| UARTs | 6 | +| SPIs | 1 | +| I2Cs | 1 | +| RTC | 1 | +| Vcc | 2.0V - 3.6V | +| Datasheet | [Datasheet](https://www.st.com/en/microcontrollers-microprocessors/stm32f030f4.html) | +| Reference Manual | [Reference Manual](https://www.st.com/resource/en/datasheet/stm32f030f4.pdf) | +| Programming Manual | [Programming Manual](http://www.st.com/resource/en/programming_manual/dm00051352.pdf) | + +## Flashing the device +The STM32F030F4 Demo Board board does not include a programmer. +You have to connect a separate ST-Link programmer to the (SW)DIO, (SW)CLK, GND and +NRST pins on the board. + +If you want a serial terminal, you have to connect a separate USB-Serial adapter to +the RX and TX pins on the board. + +The easiest way to program the board is to use OpenOCD. Once you have installed +OpenOCD (look [here](https://github.com/RIOT-OS/RIOT/wiki/OpenOCD) for +installation instructions), you can flash the board simply by typing + +``` +make BOARD=stm32f030f4-demo flash +``` +and debug via GDB by simply typing +``` +make BOARD=stm32f030f4-demo debug +``` + + */ diff --git a/boards/stm32f030f4-demo/include/board.h b/boards/stm32f030f4-demo/include/board.h new file mode 100644 index 0000000000..dcf94554bc --- /dev/null +++ b/boards/stm32f030f4-demo/include/board.h @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2019 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_stm32f030f4-demo + * + * This board can be bought very cheaply (< 1€) on sites like eBay or + * AliExpress. + * + * @brief Support for the STM32F030F4 Demo Board + * @{ + * + * @file + * @brief Pin definitions and board configuration options + * + * @author Benjamin Valentin + */ + +#ifndef BOARD_H +#define BOARD_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Xtimer configuration + * @{ + */ +#define XTIMER_WIDTH (16) +/** @} */ + +/** + * @name LED pin definitions and handlers + * @{ + */ +#define LED0_PORT GPIOA +#define LED0_PIN GPIO_PIN(PORT_A, 4) +#define LED0_MASK (1 << 4) + +#define LED0_ON (LED0_PORT->BSRR = (LED0_MASK << 16)) +#define LED0_OFF (LED0_PORT->BSRR = (LED0_MASK << 0)) +#define LED0_TOGGLE (LED0_PORT->ODR ^= LED0_MASK) +/** @} */ + +/** + * @brief Initialize board specific hardware, including clock, LEDs and std-IO + */ +void board_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H */ +/** @} */ diff --git a/boards/stm32f030f4-demo/include/periph_conf.h b/boards/stm32f030f4-demo/include/periph_conf.h new file mode 100644 index 0000000000..e02cf2f319 --- /dev/null +++ b/boards/stm32f030f4-demo/include/periph_conf.h @@ -0,0 +1,189 @@ +/* + * Copyright (C) 2016 Inria + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_stm32f030f4-demo + * @{ + * + * @file + * @brief Peripheral MCU configuration for the stm32f030f4-demo board + * + * @author Hauke Petersen + * @author José Ignacio Alamos + * @author Alexandre Abadie + * @author Benjamin Valentin + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Clock settings + * + * @note This is auto-generated from + * `cpu/stm32_common/dist/clk_conf/clk_conf.c` + * @{ + */ +/* give the target core clock (HCLK) frequency [in Hz], + * maximum: 48MHz */ + #define CLOCK_CORECLOCK (48000000U) + /* 0: no external high speed crystal available + * else: actual crystal frequency [in Hz] */ + #define CLOCK_HSE (8000000U) + /* 0: no external low speed crystal available, + * 1: external crystal available (always 32.768kHz) */ + #define CLOCK_LSE (0) + /* peripheral clock setup */ + #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1 + #define CLOCK_AHB (CLOCK_CORECLOCK / 1) + #define CLOCK_APB1_DIV RCC_CFGR_PPRE_DIV1 /* max 48MHz */ + #define CLOCK_APB1 (CLOCK_CORECLOCK / 1) + #define CLOCK_APB2 (CLOCK_APB1) + + /* PLL factors */ + #define CLOCK_PLL_PREDIV (1) + #define CLOCK_PLL_MUL (6) + /** @} */ + +/** + * @name Timer configuration + * @{ + */ +static const timer_conf_t timer_config[] = { + { + .dev = TIM1, + .max = 0x0000ffff, + .rcc_mask = RCC_APB2ENR_TIM1EN, + .bus = APB2, + .irqn = TIM1_CC_IRQn + }, + { + .dev = TIM3, + .max = 0x0000ffff, + .rcc_mask = RCC_APB1ENR_TIM3EN, + .bus = APB1, + .irqn = TIM3_IRQn + }, +}; + +#define TIMER_0_ISR (isr_tim1_cc) +#define TIMER_1_ISR (isr_tim3) + +#define TIMER_NUMOF ARRAY_SIZE(timer_config) +/** @} */ + +/** + * @name UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { + .dev = USART1, + .rcc_mask = RCC_APB2ENR_USART1EN, + .rx_pin = GPIO_PIN(PORT_A, 10), + .tx_pin = GPIO_PIN(PORT_A, 9), + .rx_af = GPIO_AF1, + .tx_af = GPIO_AF1, + .bus = APB2, + .irqn = USART1_IRQn + } +}; + +#define UART_0_ISR (isr_usart1) + +#define UART_NUMOF ARRAY_SIZE(uart_config) +/** @} */ + +/** + * @name PWM configuration + * @{ + */ +static const pwm_conf_t pwm_config[] = { + { + .dev = TIM3, + .rcc_mask = RCC_APB1ENR_TIM3EN, + .chan = { { .pin = GPIO_PIN(PORT_A, 6), .cc_chan = 0}, + { .pin = GPIO_PIN(PORT_A, 7), .cc_chan = 1}, + { .pin = GPIO_UNDEF, .cc_chan = 0}, + { .pin = GPIO_UNDEF, .cc_chan = 0} }, + .af = GPIO_AF1, + .bus = APB1 + } +}; + +#define PWM_NUMOF ARRAY_SIZE(pwm_config) +/** @} */ + +/** + * @name SPI configuration + * + * @note The spi_divtable is auto-generated from + * `cpu/stm32_common/dist/spi_divtable/spi_divtable.c` + * @{ + */ +static const uint8_t spi_divtable[2][5] = { + { /* for APB1 @ 48000000Hz */ + 7, /* -> 187500Hz */ + 6, /* -> 375000Hz */ + 5, /* -> 750000Hz */ + 2, /* -> 6000000Hz */ + 1 /* -> 12000000Hz */ + }, + { /* for APB2 @ 48000000Hz */ + 7, /* -> 187500Hz */ + 6, /* -> 375000Hz */ + 5, /* -> 750000Hz */ + 2, /* -> 6000000Hz */ + 1 /* -> 12000000Hz */ + } +}; + +static const spi_conf_t spi_config[] = { + { + .dev = SPI1, + .mosi_pin = GPIO_PIN(PORT_A, 7), + .miso_pin = GPIO_PIN(PORT_A, 6), + .sclk_pin = GPIO_PIN(PORT_A, 5), + .cs_pin = GPIO_PIN(PORT_B, 1), + .af = GPIO_AF0, + .rccmask = RCC_APB2ENR_SPI1EN, + .apbbus = APB2 + }, +}; + +#define SPI_NUMOF ARRAY_SIZE(spi_config) +/** @} */ + +/** + * @name ADC configuration + * @{ + */ +#define ADC_CONFIG { \ + { GPIO_PIN(PORT_A, 0), 0 }, \ + { GPIO_PIN(PORT_A, 1), 1 }, \ + { GPIO_PIN(PORT_A, 2), 2 }, \ + { GPIO_PIN(PORT_A, 3), 3 }, \ + { GPIO_PIN(PORT_A, 4), 4 },\ + { GPIO_PIN(PORT_A, 5), 5 } \ +} + +#define ADC_NUMOF (6) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ +/** @} */