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https://github.com/RIOT-OS/RIOT.git
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Merge pull request #15646 from aabadie/pr/cpu/fe310_common_clock_kconfig
cpu/fe310: boards/hifive1*: move all clock configuration at CPU level
This commit is contained in:
commit
a76deec9a8
@ -17,49 +17,3 @@ config BOARD_HIFIVE1
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select HAS_PERIPH_SPI
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select HAS_PERIPH_SPI
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select HAS_PERIPH_TIMER
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select HAS_PERIPH_TIMER
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select HAS_PERIPH_UART
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select HAS_PERIPH_UART
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menu "Hifive1 clock configuration"
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depends on BOARD_HIFIVE1
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choice
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bool "Clock source selection"
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default USE_CLOCK_HFXOSC_PLL
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config USE_CLOCK_HFXOSC_PLL
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bool "PLL clocked by high frequency external oscillator (HFXOSC)"
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config USE_CLOCK_HFXOSC
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bool "Direct High frequency external oscillator (HFXOSC)"
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config USE_CLOCK_HFROSC_PLL
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bool "PLL clocked by High frequency internal oscillator (HFROSC)"
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config USE_CLOCK_HFROSC
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bool "Direct High frequency internal oscillator (HFROSC)"
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endchoice
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# the configuration macros must always be defined for clock.c to compile
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config CLOCK_PLL_F
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int "F: REFR multiply factor" if USE_CLOCK_HFXOSC_PLL
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default 39
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config CLOCK_PLL_Q
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int "Q: VCO divide factor" if USE_CLOCK_HFXOSC_PLL
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default 1
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config CLOCK_DESIRED_FREQUENCY
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int "Desired clock frequency" if USE_CLOCK_HFROSC_PLL
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default 320000000
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range 1000000 320000000
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config CLOCK_HFROSC_TRIM
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int "TRIM: input frequency multiplier" if USE_CLOCK_HFROSC
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default 6
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range 0 31
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config CLOCK_HFROSC_DIV
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int "DIV: output frequency divider" if USE_CLOCK_HFROSC
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default 1
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range 0 63
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endmenu
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@ -21,102 +21,12 @@
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#define PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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/**
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* @name Core Clock configuration
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* @{
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*/
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#ifndef CONFIG_USE_CLOCK_HFXOSC_PLL
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HFXOSC) || IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC_PLL) || \
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IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC)
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#define CONFIG_USE_CLOCK_HFXOSC_PLL 0
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#else
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#define CONFIG_USE_CLOCK_HFXOSC_PLL 1 /* Use PLL clocked by HFXOSC by default */
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#endif
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#endif /* CONFIG_USE_CLOCK_HFXOSC_PLL */
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#ifndef CONFIG_USE_CLOCK_HFXOSC
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#define CONFIG_USE_CLOCK_HFXOSC 0
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#endif /* CONFIG_USE_CLOCK_HFXOSC */
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#ifndef CONFIG_USE_CLOCK_HFROSC_PLL
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#define CONFIG_USE_CLOCK_HFROSC_PLL 0
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#endif /* CONFIG_USE_CLOCK_HFROSC_PLL */
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#ifndef CONFIG_USE_CLOCK_HFROSC
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#define CONFIG_USE_CLOCK_HFROSC 0
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#endif /* CONFIG_USE_CLOCK_HFROSC */
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#if CONFIG_USE_CLOCK_HFXOSC_PLL && \
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(CONFIG_USE_CLOCK_HFROSC_PLL || CONFIG_USE_CLOCK_HFROSC || CONFIG_USE_CLOCK_HFXOSC)
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#error "Cannot use HFXOSC_PLL with other clock configurations"
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#endif
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#if CONFIG_USE_CLOCK_HFXOSC && \
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(CONFIG_USE_CLOCK_HFROSC_PLL || CONFIG_USE_CLOCK_HFROSC || CONFIG_USE_CLOCK_HFXOSC_PLL)
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#error "Cannot use HFXOSC with other clock configurations"
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#endif
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#if CONFIG_USE_CLOCK_HFROSC_PLL && \
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(CONFIG_USE_CLOCK_HFXOSC_PLL || CONFIG_USE_CLOCK_HFXOSC || CONFIG_USE_CLOCK_HFROSC)
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#error "Cannot use HFROSC_PLL with other clock configurations"
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#endif
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#if CONFIG_USE_CLOCK_HFROSC && \
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(CONFIG_USE_CLOCK_HFXOSC_PLL || CONFIG_USE_CLOCK_HFXOSC || CONFIG_USE_CLOCK_HFROSC_PLL)
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#error "Cannot use HFROSC with other clock configurations"
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#endif
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#define CONFIG_CLOCK_PLL_R (1) /* Divide input clock by 2, mandatory with HFXOSC */
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#ifndef CONFIG_CLOCK_PLL_F
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#define CONFIG_CLOCK_PLL_F (39) /* Multiply REFR by 80, e.g 2 * (39 + 1) */
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#endif
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#ifndef CONFIG_CLOCK_PLL_Q
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#define CONFIG_CLOCK_PLL_Q (1) /* Divide VCO by 2, e.g 2^1 */
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#endif
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#if CONFIG_USE_CLOCK_HFXOSC_PLL
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#define CLOCK_PLL_INPUT_CLOCK MHZ(16)
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#define CLOCK_PLL_REFR (CLOCK_PLL_INPUT_CLOCK / (CONFIG_CLOCK_PLL_R + 1))
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#define CLOCK_PLL_VCO (CLOCK_PLL_REFR * (2 * (CONFIG_CLOCK_PLL_F + 1)))
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#define CLOCK_PLL_OUT (CLOCK_PLL_VCO / (1 << CONFIG_CLOCK_PLL_Q))
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#define CLOCK_CORECLOCK (CLOCK_PLL_OUT) /* 320000000Hz with the values used above */
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/* Check PLL settings */
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#if CLOCK_PLL_REFR != MHZ(8)
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#error "Only R=2 can be used when using HFXOSC"
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#endif
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#if (CLOCK_PLL_VCO < MHZ(384)) || (CLOCK_PLL_VCO > MHZ(768))
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#error "VCO frequency must be in the range [384MHz - 768MHz], check the CLOCK_PLL_F value"
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#endif
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#if (CLOCK_PLL_OUT < MHZ(48)) || (CLOCK_PLL_OUT > MHZ(384))
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#error "PLL output frequency must be in the range [48MHz - 384MHz], check the CLOCK_PLL_Q value"
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#endif
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#elif CONFIG_USE_CLOCK_HFXOSC
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#define CLOCK_CORECLOCK MHZ(16)
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#endif
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/*
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When using HFROSC input clock, the core clock cannot be computed from settings,
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call cpu_freq() to get the configured CPU frequency.
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*/
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#ifndef CONFIG_CLOCK_DESIRED_FREQUENCY
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#define CONFIG_CLOCK_DESIRED_FREQUENCY MHZ(320)
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#endif
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#ifndef CONFIG_CLOCK_HFROSC_TRIM
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#define CONFIG_CLOCK_HFROSC_TRIM (6) /* ~72000000Hz input freq */
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#endif
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#ifndef CONFIG_CLOCK_HFROSC_DIV
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#define CONFIG_CLOCK_HFROSC_DIV (1) /* Divide by 2 */
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#endif
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/** @} */
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/**
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/**
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* @name Timer configuration
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* @name Timer configuration
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*
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*
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@ -19,50 +19,3 @@ config BOARD_HIFIVE1B
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select HAS_PERIPH_TIMER
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select HAS_PERIPH_TIMER
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select HAS_PERIPH_UART
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select HAS_PERIPH_UART
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select HAS_ARDUINO
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select HAS_ARDUINO
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menu "Hifive1b clock configuration"
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depends on BOARD_HIFIVE1B
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choice
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bool "Clock source selection"
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default USE_CLOCK_HFXOSC_PLL
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config USE_CLOCK_HFXOSC_PLL
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bool "PLL clocked by high frequency external oscillator (HFXOSC)"
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config USE_CLOCK_HFXOSC
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bool "Direct High frequency external oscillator (HFXOSC)"
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config USE_CLOCK_HFROSC_PLL
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bool "PLL clocked by High frequency internal oscillator (HFROSC)"
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config USE_CLOCK_HFROSC
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bool "Direct High frequency internal oscillator (HFROSC)"
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endchoice
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# the configuration macros must always be defined for clock.c to compile
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config CLOCK_PLL_F
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int "F: REFR multiply factor" if USE_CLOCK_HFXOSC_PLL
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default 39
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config CLOCK_PLL_Q
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int "Q: VCO divide factor" if USE_CLOCK_HFXOSC_PLL
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default 1
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config CLOCK_DESIRED_FREQUENCY
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int
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prompt "Desired clock frequency" if USE_CLOCK_HFROSC_PLL
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default 320000000
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range 1000000 320000000
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config CLOCK_HFROSC_TRIM
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int "TRIM: input frequency multiplier" if USE_CLOCK_HFROSC
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default 6
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range 0 31
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config CLOCK_HFROSC_DIV
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int "DIV: output frequency divider" if USE_CLOCK_HFROSC
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default 1
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range 0 63
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endmenu
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@ -22,102 +22,12 @@
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#define PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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/**
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* @name Core Clock configuration
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* @{
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*/
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#ifndef CONFIG_USE_CLOCK_HFXOSC_PLL
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HFXOSC) || IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC_PLL) || \
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IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC)
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#define CONFIG_USE_CLOCK_HFXOSC_PLL 0
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#else
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#define CONFIG_USE_CLOCK_HFXOSC_PLL 1 /* Use PLL clocked by HFXOSC by default */
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#endif
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#endif /* CONFIG_USE_CLOCK_HFXOSC_PLL */
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#ifndef CONFIG_USE_CLOCK_HFXOSC
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#define CONFIG_USE_CLOCK_HFXOSC 0
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#endif /* CONFIG_USE_CLOCK_HFXOSC */
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#ifndef CONFIG_USE_CLOCK_HFROSC_PLL
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#define CONFIG_USE_CLOCK_HFROSC_PLL 0
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#endif /* CONFIG_USE_CLOCK_HFROSC_PLL */
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#ifndef CONFIG_USE_CLOCK_HFROSC
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#define CONFIG_USE_CLOCK_HFROSC 0
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#endif /* CONFIG_USE_CLOCK_HFROSC */
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#if CONFIG_USE_CLOCK_HFXOSC_PLL && \
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(CONFIG_USE_CLOCK_HFROSC_PLL || CONFIG_USE_CLOCK_HFROSC || CONFIG_USE_CLOCK_HFXOSC)
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#error "Cannot use HFXOSC_PLL with other clock configurations"
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#endif
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#if CONFIG_USE_CLOCK_HFXOSC && \
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(CONFIG_USE_CLOCK_HFROSC_PLL || CONFIG_USE_CLOCK_HFROSC || CONFIG_USE_CLOCK_HFXOSC_PLL)
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#error "Cannot use HFXOSC with other clock configurations"
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#endif
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#if CONFIG_USE_CLOCK_HFROSC_PLL && \
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(CONFIG_USE_CLOCK_HFXOSC_PLL || CONFIG_USE_CLOCK_HFXOSC || CONFIG_USE_CLOCK_HFROSC)
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#error "Cannot use HFROSC_PLL with other clock configurations"
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#endif
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#if CONFIG_USE_CLOCK_HFROSC && \
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(CONFIG_USE_CLOCK_HFXOSC_PLL || CONFIG_USE_CLOCK_HFXOSC || CONFIG_USE_CLOCK_HFROSC_PLL)
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#error "Cannot use HFROSC with other clock configurations"
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#endif
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#define CONFIG_CLOCK_PLL_R (1) /* Divide input clock by 2, mandatory with HFXOSC */
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#ifndef CONFIG_CLOCK_PLL_F
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#define CONFIG_CLOCK_PLL_F (39) /* Multiply REFR by 80, e.g 2 * (39 + 1) */
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#endif
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#ifndef CONFIG_CLOCK_PLL_Q
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#define CONFIG_CLOCK_PLL_Q (1) /* Divide VCO by 2, e.g 2^1 */
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#endif
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#if CONFIG_USE_CLOCK_HFXOSC_PLL
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#define CLOCK_PLL_INPUT_CLOCK MHZ(16)
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#define CLOCK_PLL_REFR (CLOCK_PLL_INPUT_CLOCK / (CONFIG_CLOCK_PLL_R + 1))
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#define CLOCK_PLL_VCO (CLOCK_PLL_REFR * (2 * (CONFIG_CLOCK_PLL_F + 1)))
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#define CLOCK_PLL_OUT (CLOCK_PLL_VCO / (1 << CONFIG_CLOCK_PLL_Q))
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#define CLOCK_CORECLOCK (CLOCK_PLL_OUT) /* 320000000Hz with the values used above */
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/* Check PLL settings */
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#if CLOCK_PLL_REFR != MHZ(8)
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#error "Only R=2 can be used when using HFXOSC"
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#endif
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#if (CLOCK_PLL_VCO < MHZ(384)) || (CLOCK_PLL_VCO > MHZ(768))
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#error "VCO frequency must be in the range [384MHz - 768MHz], check the CLOCK_PLL_F value"
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#endif
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#if (CLOCK_PLL_OUT < MHZ(48)) || (CLOCK_PLL_OUT > MHZ(384))
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#error "PLL output frequency must be in the range [48MHz - 384MHz], check the CLOCK_PLL_Q value"
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#endif
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#elif CONFIG_USE_CLOCK_HFXOSC
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#define CLOCK_CORECLOCK MHZ(16)
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#endif
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/*
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When using HFROSC input clock, the core clock cannot be computed from settings,
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call cpu_freq() to get the configured CPU frequency.
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*/
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#ifndef CONFIG_CLOCK_DESIRED_FREQUENCY
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#define CONFIG_CLOCK_DESIRED_FREQUENCY MHZ(320)
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#endif
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#ifndef CONFIG_CLOCK_HFROSC_TRIM
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#define CONFIG_CLOCK_HFROSC_TRIM (6) /* ~72000000Hz input freq */
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#endif
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#ifndef CONFIG_CLOCK_HFROSC_DIV
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#define CONFIG_CLOCK_HFROSC_DIV (1) /* Divide by 2 */
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#endif
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/** @} */
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/**
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/**
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* @name Timer configuration
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* @name Timer configuration
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*
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*
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@ -64,3 +64,5 @@ config CPU_MODEL
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config CPU
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config CPU
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default "fe310" if CPU_FAM_FE310
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default "fe310" if CPU_FAM_FE310
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rsource "Kconfig.clk"
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53
cpu/fe310/Kconfig.clk
Normal file
53
cpu/fe310/Kconfig.clk
Normal file
@ -0,0 +1,53 @@
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# Copyright (c) 2020 Inria
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#
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# This file is subject to the terms and conditions of the GNU Lesser
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||||||
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# General Public License v2.1. See the file LICENSE in the top level
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||||||
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# directory for more details.
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||||||
|
#
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menu "FE310 clock configuration"
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depends on CPU_FAM_FE310
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choice
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bool "Clock source selection"
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default USE_CLOCK_HFXOSC_PLL
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config USE_CLOCK_HFXOSC_PLL
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bool "PLL clocked by high frequency external oscillator (HFXOSC)"
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config USE_CLOCK_HFXOSC
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bool "Direct High frequency external oscillator (HFXOSC)"
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config USE_CLOCK_HFROSC_PLL
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bool "PLL clocked by High frequency internal oscillator (HFROSC)"
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config USE_CLOCK_HFROSC
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bool "Direct High frequency internal oscillator (HFROSC)"
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endchoice
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# the configuration macros must always be defined for clock.c to compile
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config CLOCK_PLL_F
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int "F: REFR multiply factor" if USE_CLOCK_HFXOSC_PLL
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||||||
|
default 39
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||||||
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config CLOCK_PLL_Q
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int "Q: VCO divide factor" if USE_CLOCK_HFXOSC_PLL
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||||||
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default 1
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||||||
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||||||
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config CLOCK_DESIRED_FREQUENCY
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int
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||||||
|
prompt "Desired clock frequency" if USE_CLOCK_HFROSC_PLL
|
||||||
|
default 320000000
|
||||||
|
range 1000000 320000000
|
||||||
|
|
||||||
|
config CLOCK_HFROSC_TRIM
|
||||||
|
int "TRIM: input frequency multiplier" if USE_CLOCK_HFROSC
|
||||||
|
default 6
|
||||||
|
range 0 31
|
||||||
|
|
||||||
|
config CLOCK_HFROSC_DIV
|
||||||
|
int "DIV: output frequency divider" if USE_CLOCK_HFROSC
|
||||||
|
default 1
|
||||||
|
range 0 63
|
||||||
|
|
||||||
|
endmenu
|
124
cpu/fe310/include/clk_conf.h
Normal file
124
cpu/fe310/include/clk_conf.h
Normal file
@ -0,0 +1,124 @@
|
|||||||
|
/*
|
||||||
|
* Copyright (C) 2019-2020 Inria
|
||||||
|
*
|
||||||
|
* This file is subject to the terms and conditions of the GNU Lesser General
|
||||||
|
* Public License v2.1. See the file LICENSE in the top level directory for more
|
||||||
|
* details.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @ingroup cpu_fe310
|
||||||
|
* @{
|
||||||
|
*
|
||||||
|
* @file
|
||||||
|
* @brief Clock configuration for the FE310 cpu
|
||||||
|
*
|
||||||
|
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef CLK_CONF_H
|
||||||
|
#define CLK_CONF_H
|
||||||
|
|
||||||
|
#include "macros/units.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @name Core Clock configuration
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#ifndef CONFIG_USE_CLOCK_HFXOSC_PLL
|
||||||
|
#if IS_ACTIVE(CONFIG_USE_CLOCK_HFXOSC) || IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC_PLL) || \
|
||||||
|
IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC)
|
||||||
|
#define CONFIG_USE_CLOCK_HFXOSC_PLL 0
|
||||||
|
#else
|
||||||
|
#define CONFIG_USE_CLOCK_HFXOSC_PLL 1 /* Use PLL clocked by HFXOSC by default */
|
||||||
|
#endif
|
||||||
|
#endif /* CONFIG_USE_CLOCK_HFXOSC_PLL */
|
||||||
|
|
||||||
|
#ifndef CONFIG_USE_CLOCK_HFXOSC
|
||||||
|
#define CONFIG_USE_CLOCK_HFXOSC 0
|
||||||
|
#endif /* CONFIG_USE_CLOCK_HFXOSC */
|
||||||
|
|
||||||
|
#ifndef CONFIG_USE_CLOCK_HFROSC_PLL
|
||||||
|
#define CONFIG_USE_CLOCK_HFROSC_PLL 0
|
||||||
|
#endif /* CONFIG_USE_CLOCK_HFROSC_PLL */
|
||||||
|
|
||||||
|
#ifndef CONFIG_USE_CLOCK_HFROSC
|
||||||
|
#define CONFIG_USE_CLOCK_HFROSC 0
|
||||||
|
#endif /* CONFIG_USE_CLOCK_HFROSC */
|
||||||
|
|
||||||
|
#if CONFIG_USE_CLOCK_HFXOSC_PLL && \
|
||||||
|
(CONFIG_USE_CLOCK_HFROSC_PLL || CONFIG_USE_CLOCK_HFROSC || CONFIG_USE_CLOCK_HFXOSC)
|
||||||
|
#error "Cannot use HFXOSC_PLL with other clock configurations"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if CONFIG_USE_CLOCK_HFXOSC && \
|
||||||
|
(CONFIG_USE_CLOCK_HFROSC_PLL || CONFIG_USE_CLOCK_HFROSC || CONFIG_USE_CLOCK_HFXOSC_PLL)
|
||||||
|
#error "Cannot use HFXOSC with other clock configurations"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if CONFIG_USE_CLOCK_HFROSC_PLL && \
|
||||||
|
(CONFIG_USE_CLOCK_HFXOSC_PLL || CONFIG_USE_CLOCK_HFXOSC || CONFIG_USE_CLOCK_HFROSC)
|
||||||
|
#error "Cannot use HFROSC_PLL with other clock configurations"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if CONFIG_USE_CLOCK_HFROSC && \
|
||||||
|
(CONFIG_USE_CLOCK_HFXOSC_PLL || CONFIG_USE_CLOCK_HFXOSC || CONFIG_USE_CLOCK_HFROSC_PLL)
|
||||||
|
#error "Cannot use HFROSC with other clock configurations"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define CONFIG_CLOCK_PLL_R (1) /* Divide input clock by 2, mandatory with HFXOSC */
|
||||||
|
#ifndef CONFIG_CLOCK_PLL_F
|
||||||
|
#define CONFIG_CLOCK_PLL_F (39) /* Multiply REFR by 80, e.g 2 * (39 + 1) */
|
||||||
|
#endif
|
||||||
|
#ifndef CONFIG_CLOCK_PLL_Q
|
||||||
|
#define CONFIG_CLOCK_PLL_Q (1) /* Divide VCO by 2, e.g 2^1 */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if CONFIG_USE_CLOCK_HFXOSC_PLL
|
||||||
|
#define CLOCK_PLL_INPUT_CLOCK MHZ(16)
|
||||||
|
#define CLOCK_PLL_REFR (CLOCK_PLL_INPUT_CLOCK / (CONFIG_CLOCK_PLL_R + 1))
|
||||||
|
#define CLOCK_PLL_VCO (CLOCK_PLL_REFR * (2 * (CONFIG_CLOCK_PLL_F + 1)))
|
||||||
|
#define CLOCK_PLL_OUT (CLOCK_PLL_VCO / (1 << CONFIG_CLOCK_PLL_Q))
|
||||||
|
#define CLOCK_CORECLOCK (CLOCK_PLL_OUT) /* 320000000Hz with the values used above */
|
||||||
|
|
||||||
|
/* Check PLL settings */
|
||||||
|
#if CLOCK_PLL_REFR != MHZ(8)
|
||||||
|
#error "Only R=2 can be used when using HFXOSC"
|
||||||
|
#endif
|
||||||
|
#if (CLOCK_PLL_VCO < MHZ(384)) || (CLOCK_PLL_VCO > MHZ(768))
|
||||||
|
#error "VCO frequency must be in the range [384MHz - 768MHz], check the CLOCK_PLL_F value"
|
||||||
|
#endif
|
||||||
|
#if (CLOCK_PLL_OUT < MHZ(48)) || (CLOCK_PLL_OUT > MHZ(384))
|
||||||
|
#error "PLL output frequency must be in the range [48MHz - 384MHz], check the CLOCK_PLL_Q value"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#elif CONFIG_USE_CLOCK_HFXOSC
|
||||||
|
#define CLOCK_CORECLOCK MHZ(16)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
When using HFROSC input clock, the core clock cannot be computed from settings,
|
||||||
|
call cpu_freq() to get the configured CPU frequency.
|
||||||
|
*/
|
||||||
|
#ifndef CONFIG_CLOCK_DESIRED_FREQUENCY
|
||||||
|
#define CONFIG_CLOCK_DESIRED_FREQUENCY MHZ(320)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef CONFIG_CLOCK_HFROSC_TRIM
|
||||||
|
#define CONFIG_CLOCK_HFROSC_TRIM (6) /* ~72000000Hz input freq */
|
||||||
|
#endif
|
||||||
|
#ifndef CONFIG_CLOCK_HFROSC_DIV
|
||||||
|
#define CONFIG_CLOCK_HFROSC_DIV (1) /* Divide by 2 */
|
||||||
|
#endif
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* CLK_CONF_H */
|
||||||
|
/** @} */
|
Loading…
Reference in New Issue
Block a user