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cpu/mips32r2_generic: remove cpu.
The `mips32r2_generic` CPU was only used by the `mips-malta` board which has been removed. The reasons for this removal are the same as for the board: - No hardware to test. - The board that used this CPU is not available off the shelf. - No UART input. - No integrated flasher (one needs to use a separate Windows tool) For more information and discussion around MIPS, see issues: - #11831 (Removal of mips-malta) - #11788 (General MIPS removal)
This commit is contained in:
Juan Carrano
parent
1ad3c780d4
commit
a2bcd7539c
@ -1,5 +0,0 @@
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MODULE = cpu
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DIRS += $(RIOTCPU)/mips32r2_common
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include $(RIOTBASE)/Makefile.base
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@ -1 +0,0 @@
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-include $(RIOTCPU)/mips32r2_common/Makefile.features
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@ -1,8 +0,0 @@
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export MEMORY_BASE=0x80000000
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export MEMORY_SIZE=1M
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export APP_START=0x80000000
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include $(RIOTMAKE)/arch/mips.inc.mk
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include $(RIOTCPU)/mips32r2_common/Makefile.include
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export LINKFLAGS += -Tuhi32.ld
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@ -1,48 +0,0 @@
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/*
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* Copyright 2016, Imagination Technologies Limited and/or its
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* affiliated group companies.
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @defgroup cpu_mips32r2_generic Imagination Technologies MIPS32R2 generic
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* @ingroup cpu
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* @brief Imagination Technologies MIPS32R2 generic
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* @{
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*
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* @file
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* @brief Common implementations and headers for Imagination Technologies MIPS32R2 compliant devices
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*
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* @author Neil Jones <neil.jones@imgtec.com>
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*/
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#ifndef CPU_H
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#define CPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdio.h>
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#include <inttypes.h>
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#include "irq.h"
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/**
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* @brief Print the last instruction's address
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*
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* @todo: Not supported
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*/
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static inline void cpu_print_last_instruction(void)
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{
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/* This function must exist else RIOT won't compile */
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* CPU_H */
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/** @} */
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@ -1,67 +0,0 @@
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/*
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* Copyright 2016, Imagination Technologies Limited and/or its
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* affiliated group companies.
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_mips32r2_generic
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* @{
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*
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* @file
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* @brief Common CPU definitions for MIPS32R2 compliant devices.
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*
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* @author Neil Jones <neil.jones@imgtec.com>
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*/
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#ifndef CPU_CONF_H
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#define CPU_CONF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Configuration of default stack sizes
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*
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* printf takes a pretty tortured route through the C lib
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* then via UHI syscall exception to end up at the UART
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* driver.
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*
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* When debugging timer code we get printfs on the idle threads
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* stack which can easily blow its limits.
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*
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* Note code must be compiled at -Os with these values, using -O0
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* you'll overflow these stacks.
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*
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* NO ISR stack is in use yet, interrupt use the current running stack
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* hence the big-ish default stack size.
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* @{
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*/
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#ifndef THREAD_EXTRA_STACKSIZE_PRINTF
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#define THREAD_EXTRA_STACKSIZE_PRINTF (1024)
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#endif
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#ifndef THREAD_STACKSIZE_DEFAULT
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#define THREAD_STACKSIZE_DEFAULT (2048)
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#endif
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#ifndef THREAD_STACKSIZE_IDLE
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#ifdef NDEBUG
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#define THREAD_STACKSIZE_IDLE (512)
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#else
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#define THREAD_STACKSIZE_IDLE (512 + THREAD_EXTRA_STACKSIZE_PRINTF)
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#endif
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#endif
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* CPU_CONF_H */
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/** @} */
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@ -1,37 +0,0 @@
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/*
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* Copyright 2016, Imagination Technologies Limited and/or its
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* affiliated group companies.
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/* This file must exist to get timer code to build */
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/* No peripherals I/O via JTAG or Bootloader using UHI */
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Power management configuration
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* @{
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*/
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#define PROVIDES_PM_SET_LOWEST
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/** @} */
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/**
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* @brief Prevent shared timer functions from being used
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*/
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#define PERIPH_TIMER_PROVIDES_SET
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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