mirror of
https://github.com/RIOT-OS/RIOT.git
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added new board f4vi1
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1126128ea9
commit
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4
boards/f4vi1/Makefile
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4
boards/f4vi1/Makefile
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# tell the Makefile.base which module to build
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MODULE = $(BOARD)_base
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include $(RIOTBASE)/Makefile.base
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1
boards/f4vi1/Makefile.features
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1
boards/f4vi1/Makefile.features
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FEATURES_PROVIDED += periph_uart
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49
boards/f4vi1/Makefile.include
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49
boards/f4vi1/Makefile.include
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# define the cpu used by the stm32f4-discovery board
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export CPU = stm32f4
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export CPU_MODEL = stm32f415rg
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#define the default port depending on the host OS
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OS := $(shell uname)
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ifeq ($(OS),Linux)
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PORT ?= /dev/ttyUSB0
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else ifeq ($(OS),Darwin)
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PORT ?= $(shell ls -1 /dev/tty.SLAB_USBtoUART* | head -n 1)
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else
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$(info CAUTION: No flash tool for your host system found!)
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# TODO: add support for windows as host platform
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endif
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export PORT
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# define tools used for building the project
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export PREFIX = arm-none-eabi-
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export CC = $(PREFIX)gcc
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export AR = $(PREFIX)ar
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export AS = $(PREFIX)as
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export LINK = $(PREFIX)gcc
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export SIZE = $(PREFIX)size
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export OBJCOPY = $(PREFIX)objcopy
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export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm
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export FLASHER = st-flash
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export DEBUGGER = $(RIOTBOARD)/$(BOARD)/dist/debug.sh
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export DEBUGSERVER = st-util
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# define build specific options
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CPU_USAGE = -mcpu=cortex-m4
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FPU_USAGE = -mfloat-abi=hard -mfpu=fpv4-sp-d16
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export CFLAGS += -ggdb -g3 -std=gnu99 -Os -Wall -Wstrict-prototypes $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -mthumb -mthumb-interwork -nostartfiles
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export CFLAGS += -ffunction-sections -fdata-sections -fno-builtin
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export ASFLAGS += -ggdb -g3 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian
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export LINKFLAGS += -g3 -ggdb -std=gnu99 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -static -lgcc -mthumb -mthumb-interwork -nostartfiles
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export LINKFLAGS += -T$(LINKERSCRIPT)
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export OFLAGS = -O binary
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export FFLAGS = write bin/$(BOARD)/$(APPLICATION).hex 0x8000000
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export DEBUGGER_FLAGS = $(RIOTBOARD)/$(BOARD)/dist/gdb.conf $(BINDIR)/$(APPLICATION).elf
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export TERMFLAGS += -p "$(PORT)"
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# use newLib nano-specs if available
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ifeq ($(shell $(LINK) -specs=nano.specs -E - 2>/dev/null >/dev/null </dev/null ; echo $$?),0)
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export LINKFLAGS += -specs=nano.specs -lc -lnosys
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endif
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# export board specific includes to the global includes-listing
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export INCLUDES += -I$(RIOTBOARD)/$(BOARD)/include
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63
boards/f4vi1/board.c
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63
boards/f4vi1/board.c
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup board_f4vi1
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* @{
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*
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* @file
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* @brief Board specific implementations for the f4vi1 board
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*
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* @author Stefan Pfeiffer <pfeiffer@inf.fu-berlin.de>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include "board.h"
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static void leds_init(void);
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void board_init(void)
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{
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/* initialize the boards LEDs, this is done first for debugging purposes */
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leds_init();
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/* initialize the CPU */
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cpu_init();
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}
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/**
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* @brief Initialize the boards on-board LEDs (LD4,LD5 and LD6)
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*
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* The LED initialization is hard-coded in this function. As the LEDs are soldered
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* onto the board they are fixed to their CPU pins.
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*
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* The LEDs are connected to the following pins:
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* - LD4: PA 1
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* - LD5: PA 3
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* - LD6: PA 2
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*/
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static void leds_init(void)
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{
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/* enable clock for port GPIOD */
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
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/* configure pins as general outputs */
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LED_PORT->MODER &= ~(0x000000FC);
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LED_PORT->MODER |= 0x00000054;
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/* set output speed high-speed */
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LED_PORT->OSPEEDR |= 0x000000FC;
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/* set output type to push-pull */
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LED_PORT->OTYPER &= ~(0x000E);
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/* disable pull resistors */
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LED_PORT->PUPDR &= ~(0x000000FC);
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/* turn all LEDs off */
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LED_PORT->BSRRL = 0x00E;
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}
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4
boards/f4vi1/dist/debug.sh
vendored
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4
boards/f4vi1/dist/debug.sh
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#!/bin/sh
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echo "Debugging $1"
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arm-none-eabi-gdb -tui -command=$1 $2
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1
boards/f4vi1/dist/gdb.conf
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1
boards/f4vi1/dist/gdb.conf
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tar extended-remote :4242
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98
boards/f4vi1/include/board.h
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boards/f4vi1/include/board.h
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @defgroup board_f4vi1 F4VI1
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* @ingroup boards
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* @brief Board specific files for the F4VI1 board
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* @{
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*
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* @file
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* @brief Board specific definitions for the f4vi1 board
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*
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* @author Stefan Pfeiffer <pfeiffer@inf.fu-berlin.de>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef __BOARD_H
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#define __BOARD_H
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#include "cpu.h"
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#include "periph_conf.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Define the nominal CPU core clock in this board
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*/
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#define F_CPU CLOCK_CORECLOCK
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/**
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* @name Assign the hardware timer
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*/
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#define HW_TIMER TIMER_0
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/**
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* @name Define UART device and baudrate for stdio
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* @{
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*/
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#define STDIO UART_0
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#define STDIO_BAUDRATE (115200U)
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#define STDIO_RX_BUFSIZE (64U)
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/** @} */
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/**
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* @name LED pin definitions
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* @{
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*/
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#define LED_PORT GPIOA
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#define LD4_PIN (1 << 1)
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#define LD5_PIN (1 << 3)
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#define LD6_PIN (1 << 2)
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/** @} */
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/**
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* @name Macros for controlling the on-board LEDs.
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* @{
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*/
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#define LD4_ON (LED_PORT->BSRRH = LD4_PIN)
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#define LD4_OFF (LED_PORT->BSRRL = LD4_PIN)
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#define LD4_TOGGLE (LED_PORT->ODR ^= LD4_PIN)
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#define LD5_ON (LED_PORT->BSRRH = LD5_PIN)
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#define LD5_OFF (LED_PORT->BSRRL = LD5_PIN)
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#define LD5_TOGGLE (LED_PORT->ODR ^= LD5_PIN)
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#define LD6_ON (LED_PORT->BSRRH = LD6_PIN)
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#define LD6_OFF (LED_PORT->BSRRL = LD6_PIN)
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#define LD6_TOGGLE (LED_PORT->ODR ^= LD6_PIN)
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/* for compatability to other boards */
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#define LED_GREEN_ON LD6_ON
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#define LED_GREEN_OFF LD6_OFF
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#define LED_GREEN_TOGGLE LD6_TOGGLE
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#define LED_RED_ON LD5_ON
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#define LED_RED_OFF LD5_OFF
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#define LED_RED_TOGGLE LD5_TOGGLE
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#define LED_ORANGE_ON LD4_ON
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#define LED_ORANGE_OFF LD4_OFF
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#define LED_ORANGE_TOGGLE LD4_TOGGLE
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/** @} */
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/**
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* @brief Initialize board specific hardware, including clock, LEDs and std-IO
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*/
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void board_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /** __BOARD_H */
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/** @} */
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103
boards/f4vi1/include/periph_conf.h
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103
boards/f4vi1/include/periph_conf.h
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup board_f4vi1
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* @{
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*
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* @file
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* @name Peripheral MCU configuration for the F4VI1 board
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*
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* @author Stefan Pfeiffer <pfeiffer@inf.fu-berlin.de>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de>
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*/
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#ifndef __PERIPH_CONF_H
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#define __PERIPH_CONF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock system configuration
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* @{
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*/
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#define CLOCK_HSE (16000000U) /* external oscillator */
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#define CLOCK_CORECLOCK (168000000U) /* desired core clock frequency */
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/* the actual PLL values are automatically generated */
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#define CLOCK_PLL_M (CLOCK_HSE / 1000000)
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#define CLOCK_PLL_N ((CLOCK_CORECLOCK / 1000000) * 2)
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#define CLOCK_PLL_P (2U)
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#define CLOCK_PLL_Q (CLOCK_PLL_N / 48)
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#define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
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#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2
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#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4
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#define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_5WS
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/** @} */
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/**
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* @name Timer configuration
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* @{
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*/
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#define TIMER_NUMOF (2U)
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#define TIMER_0_EN 1
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#define TIMER_1_EN 1
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#define TIMER_IRQ_PRIO 1
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/* Timer 0 configuration */
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#define TIMER_0_DEV TIM2
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#define TIMER_0_CHANNELS 4
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#define TIMER_0_PRESCALER (83U)
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#define TIMER_0_MAX_VALUE (0xffffffff)
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#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
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#define TIMER_0_ISR isr_tim2
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#define TIMER_0_IRQ_CHAN TIM2_IRQn
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/* Timer 1 configuration */
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#define TIMER_1_DEV TIM5
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#define TIMER_1_CHANNELS 4
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#define TIMER_1_PRESCALER (83U)
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#define TIMER_1_MAX_VALUE (0xffffffff)
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#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM5EN)
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#define TIMER_1_ISR isr_tim5
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#define TIMER_1_IRQ_CHAN TIM5_IRQn
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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#define UART_NUMOF (1U)
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#define UART_0_EN 1
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#define UART_1_EN 0
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#define UART_IRQ_PRIO 1
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/* UART 0 device configuration */
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#define UART_0_DEV USART6
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#define UART_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_USART6EN)
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#define UART_0_CLKDIS() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART6EN))
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#define UART_0_CLK (84000000) /* UART clock runs with 84MHz (F_CPU / 2) */
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#define UART_0_IRQ_CHAN USART6_IRQn
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#define UART_0_ISR isr_usart6
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/* UART 0 pin configuration */
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#define UART_0_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
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#define UART_0_PORT GPIOC
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#define UART_0_TX_PIN 6
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#define UART_0_RX_PIN 7
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#define UART_0_AF 8
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PERIPH_CONF_H */
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/** @} */
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@ -31,7 +31,8 @@ QUIET ?= 1
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BOARD_BLACKLIST := arduino-due avsextrem chronos mbed_lpc1768 msb-430h msba2 redbee-econotag \
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telosb wsn430-v1_3b wsn430-v1_4 msb-430 pttu udoo qemu-i386 z1 stm32f0discovery \
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stm32f3discovery stm32f4discovery pca10000 pca10005 iot-lab_M3 arduino-mega2560 \
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msbiot yunjia-nrf51822 samr21-xpro cc2538dk openmote spark-core airfy-beacon
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msbiot yunjia-nrf51822 samr21-xpro cc2538dk openmote spark-core airfy-beacon \
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f4vi1
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# This example only works with native for now.
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# msb430-based boards: msp430-g++ is not provided in mspgcc.
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