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mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

added new board f4vi1

This commit is contained in:
Stefan Pfeiffer 2014-11-04 14:46:16 +01:00
parent 1126128ea9
commit a19d6c769d
9 changed files with 325 additions and 1 deletions

4
boards/f4vi1/Makefile Normal file
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# tell the Makefile.base which module to build
MODULE = $(BOARD)_base
include $(RIOTBASE)/Makefile.base

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FEATURES_PROVIDED += periph_uart

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# define the cpu used by the stm32f4-discovery board
export CPU = stm32f4
export CPU_MODEL = stm32f415rg
#define the default port depending on the host OS
OS := $(shell uname)
ifeq ($(OS),Linux)
PORT ?= /dev/ttyUSB0
else ifeq ($(OS),Darwin)
PORT ?= $(shell ls -1 /dev/tty.SLAB_USBtoUART* | head -n 1)
else
$(info CAUTION: No flash tool for your host system found!)
# TODO: add support for windows as host platform
endif
export PORT
# define tools used for building the project
export PREFIX = arm-none-eabi-
export CC = $(PREFIX)gcc
export AR = $(PREFIX)ar
export AS = $(PREFIX)as
export LINK = $(PREFIX)gcc
export SIZE = $(PREFIX)size
export OBJCOPY = $(PREFIX)objcopy
export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm
export FLASHER = st-flash
export DEBUGGER = $(RIOTBOARD)/$(BOARD)/dist/debug.sh
export DEBUGSERVER = st-util
# define build specific options
CPU_USAGE = -mcpu=cortex-m4
FPU_USAGE = -mfloat-abi=hard -mfpu=fpv4-sp-d16
export CFLAGS += -ggdb -g3 -std=gnu99 -Os -Wall -Wstrict-prototypes $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -mthumb -mthumb-interwork -nostartfiles
export CFLAGS += -ffunction-sections -fdata-sections -fno-builtin
export ASFLAGS += -ggdb -g3 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian
export LINKFLAGS += -g3 -ggdb -std=gnu99 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -static -lgcc -mthumb -mthumb-interwork -nostartfiles
export LINKFLAGS += -T$(LINKERSCRIPT)
export OFLAGS = -O binary
export FFLAGS = write bin/$(BOARD)/$(APPLICATION).hex 0x8000000
export DEBUGGER_FLAGS = $(RIOTBOARD)/$(BOARD)/dist/gdb.conf $(BINDIR)/$(APPLICATION).elf
export TERMFLAGS += -p "$(PORT)"
# use newLib nano-specs if available
ifeq ($(shell $(LINK) -specs=nano.specs -E - 2>/dev/null >/dev/null </dev/null ; echo $$?),0)
export LINKFLAGS += -specs=nano.specs -lc -lnosys
endif
# export board specific includes to the global includes-listing
export INCLUDES += -I$(RIOTBOARD)/$(BOARD)/include

63
boards/f4vi1/board.c Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup board_f4vi1
* @{
*
* @file
* @brief Board specific implementations for the f4vi1 board
*
* @author Stefan Pfeiffer <pfeiffer@inf.fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include "board.h"
static void leds_init(void);
void board_init(void)
{
/* initialize the boards LEDs, this is done first for debugging purposes */
leds_init();
/* initialize the CPU */
cpu_init();
}
/**
* @brief Initialize the boards on-board LEDs (LD4,LD5 and LD6)
*
* The LED initialization is hard-coded in this function. As the LEDs are soldered
* onto the board they are fixed to their CPU pins.
*
* The LEDs are connected to the following pins:
* - LD4: PA 1
* - LD5: PA 3
* - LD6: PA 2
*/
static void leds_init(void)
{
/* enable clock for port GPIOD */
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
/* configure pins as general outputs */
LED_PORT->MODER &= ~(0x000000FC);
LED_PORT->MODER |= 0x00000054;
/* set output speed high-speed */
LED_PORT->OSPEEDR |= 0x000000FC;
/* set output type to push-pull */
LED_PORT->OTYPER &= ~(0x000E);
/* disable pull resistors */
LED_PORT->PUPDR &= ~(0x000000FC);
/* turn all LEDs off */
LED_PORT->BSRRL = 0x00E;
}

4
boards/f4vi1/dist/debug.sh vendored Executable file
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#!/bin/sh
echo "Debugging $1"
arm-none-eabi-gdb -tui -command=$1 $2

1
boards/f4vi1/dist/gdb.conf vendored Normal file
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tar extended-remote :4242

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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @defgroup board_f4vi1 F4VI1
* @ingroup boards
* @brief Board specific files for the F4VI1 board
* @{
*
* @file
* @brief Board specific definitions for the f4vi1 board
*
* @author Stefan Pfeiffer <pfeiffer@inf.fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/
#ifndef __BOARD_H
#define __BOARD_H
#include "cpu.h"
#include "periph_conf.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* Define the nominal CPU core clock in this board
*/
#define F_CPU CLOCK_CORECLOCK
/**
* @name Assign the hardware timer
*/
#define HW_TIMER TIMER_0
/**
* @name Define UART device and baudrate for stdio
* @{
*/
#define STDIO UART_0
#define STDIO_BAUDRATE (115200U)
#define STDIO_RX_BUFSIZE (64U)
/** @} */
/**
* @name LED pin definitions
* @{
*/
#define LED_PORT GPIOA
#define LD4_PIN (1 << 1)
#define LD5_PIN (1 << 3)
#define LD6_PIN (1 << 2)
/** @} */
/**
* @name Macros for controlling the on-board LEDs.
* @{
*/
#define LD4_ON (LED_PORT->BSRRH = LD4_PIN)
#define LD4_OFF (LED_PORT->BSRRL = LD4_PIN)
#define LD4_TOGGLE (LED_PORT->ODR ^= LD4_PIN)
#define LD5_ON (LED_PORT->BSRRH = LD5_PIN)
#define LD5_OFF (LED_PORT->BSRRL = LD5_PIN)
#define LD5_TOGGLE (LED_PORT->ODR ^= LD5_PIN)
#define LD6_ON (LED_PORT->BSRRH = LD6_PIN)
#define LD6_OFF (LED_PORT->BSRRL = LD6_PIN)
#define LD6_TOGGLE (LED_PORT->ODR ^= LD6_PIN)
/* for compatability to other boards */
#define LED_GREEN_ON LD6_ON
#define LED_GREEN_OFF LD6_OFF
#define LED_GREEN_TOGGLE LD6_TOGGLE
#define LED_RED_ON LD5_ON
#define LED_RED_OFF LD5_OFF
#define LED_RED_TOGGLE LD5_TOGGLE
#define LED_ORANGE_ON LD4_ON
#define LED_ORANGE_OFF LD4_OFF
#define LED_ORANGE_TOGGLE LD4_TOGGLE
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /** __BOARD_H */
/** @} */

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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup board_f4vi1
* @{
*
* @file
* @name Peripheral MCU configuration for the F4VI1 board
*
* @author Stefan Pfeiffer <pfeiffer@inf.fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de>
*/
#ifndef __PERIPH_CONF_H
#define __PERIPH_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Clock system configuration
* @{
*/
#define CLOCK_HSE (16000000U) /* external oscillator */
#define CLOCK_CORECLOCK (168000000U) /* desired core clock frequency */
/* the actual PLL values are automatically generated */
#define CLOCK_PLL_M (CLOCK_HSE / 1000000)
#define CLOCK_PLL_N ((CLOCK_CORECLOCK / 1000000) * 2)
#define CLOCK_PLL_P (2U)
#define CLOCK_PLL_Q (CLOCK_PLL_N / 48)
#define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2
#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4
#define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_5WS
/** @} */
/**
* @name Timer configuration
* @{
*/
#define TIMER_NUMOF (2U)
#define TIMER_0_EN 1
#define TIMER_1_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_PRESCALER (83U)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
#define TIMER_0_ISR isr_tim2
#define TIMER_0_IRQ_CHAN TIM2_IRQn
/* Timer 1 configuration */
#define TIMER_1_DEV TIM5
#define TIMER_1_CHANNELS 4
#define TIMER_1_PRESCALER (83U)
#define TIMER_1_MAX_VALUE (0xffffffff)
#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM5EN)
#define TIMER_1_ISR isr_tim5
#define TIMER_1_IRQ_CHAN TIM5_IRQn
/** @} */
/**
* @name UART configuration
* @{
*/
#define UART_NUMOF (1U)
#define UART_0_EN 1
#define UART_1_EN 0
#define UART_IRQ_PRIO 1
/* UART 0 device configuration */
#define UART_0_DEV USART6
#define UART_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_USART6EN)
#define UART_0_CLKDIS() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART6EN))
#define UART_0_CLK (84000000) /* UART clock runs with 84MHz (F_CPU / 2) */
#define UART_0_IRQ_CHAN USART6_IRQn
#define UART_0_ISR isr_usart6
/* UART 0 pin configuration */
#define UART_0_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define UART_0_PORT GPIOC
#define UART_0_TX_PIN 6
#define UART_0_RX_PIN 7
#define UART_0_AF 8
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __PERIPH_CONF_H */
/** @} */

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@ -31,7 +31,8 @@ QUIET ?= 1
BOARD_BLACKLIST := arduino-due avsextrem chronos mbed_lpc1768 msb-430h msba2 redbee-econotag \
telosb wsn430-v1_3b wsn430-v1_4 msb-430 pttu udoo qemu-i386 z1 stm32f0discovery \
stm32f3discovery stm32f4discovery pca10000 pca10005 iot-lab_M3 arduino-mega2560 \
msbiot yunjia-nrf51822 samr21-xpro cc2538dk openmote spark-core airfy-beacon
msbiot yunjia-nrf51822 samr21-xpro cc2538dk openmote spark-core airfy-beacon \
f4vi1
# This example only works with native for now.
# msb430-based boards: msp430-g++ is not provided in mspgcc.