diff --git a/boards/esp32s3-wt32-sc01-plus/Kconfig b/boards/esp32s3-wt32-sc01-plus/Kconfig new file mode 100644 index 0000000000..a15fd8e229 --- /dev/null +++ b/boards/esp32s3-wt32-sc01-plus/Kconfig @@ -0,0 +1,40 @@ +# Copyright (c) 2020 HAW Hamburg +# 2023 Gunar Schorcht +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. + +config BOARD + default "esp32s3-wt32-sc01-plus" if BOARD_ESP32S3_WT32_SC01_PLUS + +config BOARD_ESP32S3_WT32_SC01_PLUS + bool + default y + select BOARD_COMMON_ESP32S3 + select CPU_MODEL_ESP32S3_WROOM_1X_N16R2 + select HAS_ESP_JTAG + select HAS_HIGHLEVEL_STDIO + select HAS_PERIPH_I2C + select HAS_PERIPH_SPI + select HAS_PERIPH_UART + select HAS_PERIPH_USBDEV + select HAS_SDCARD_SPI + select HAS_TINYUSB_DEVICE + + select HAVE_FT5X06 + select HAVE_LCD_PARALLEL + select HAVE_MTD_SDCARD_DEFAULT + select HAVE_ST7796 + + select MODULE_FATFS_VFS if MODULE_VFS_DEFAULT + select MODULE_USB_BOARD_RESET if MODULE_STDIO_USB_SERIAL_JTAG + select REQUIRES_USB_STDIO if MODULE_USBUS || MODULE_TINYUSB_DEVICE + +choice STDIO_IMPLEMENTATION + default MODULE_STDIO_CDC_ACM if MODULE_USBUS + default MODULE_STDIO_TINYUSB_CDC_ACM if MODULE_TINYUSB_DEVICE + default MODULE_STDIO_USB_SERIAL_JTAG +endchoice + +source "$(RIOTBOARD)/common/esp32s3/Kconfig" diff --git a/boards/esp32s3-wt32-sc01-plus/Makefile b/boards/esp32s3-wt32-sc01-plus/Makefile new file mode 100644 index 0000000000..a8b9d8fbed --- /dev/null +++ b/boards/esp32s3-wt32-sc01-plus/Makefile @@ -0,0 +1,5 @@ +MODULE = board + +DIRS = $(RIOTBOARD)/common/esp32s3 + +include $(RIOTBASE)/Makefile.base diff --git a/boards/esp32s3-wt32-sc01-plus/Makefile.dep b/boards/esp32s3-wt32-sc01-plus/Makefile.dep new file mode 100644 index 0000000000..0502f41f03 --- /dev/null +++ b/boards/esp32s3-wt32-sc01-plus/Makefile.dep @@ -0,0 +1,40 @@ +ifeq (,$(filter stdio_% slipdev_stdio usbus usbus% tinyusb_device,$(USEMODULE))) + # Use stdio_usb_serial_jtag if no other stdio is requested explicitly + # and neither USBUS nor tinyusb_device are used + USEMODULE += stdio_usb_serial_jtag + # Even if only stdio_usb_serial_jtag is enabled, usb_board_reset is enabled + # since there should be a CDC ACM interface in any case. This is necessary, + # for example, to reset the board if stdio_cdc_acm or stdio_tinyusb_cdc_acm + # was previously used. + USEMODULE += usb_board_reset + # include $(RIOTMAKE)/tools/usb_board_reset.mk +endif + +include $(RIOTBOARD)/common/esp32s3/Makefile.dep +include $(RIOTBOARD)/common/makefiles/stdio_cdc_acm.dep.mk + +# default to using fatfs on SD card +ifneq (,$(filter vfs_default,$(USEMODULE))) + USEMODULE += fatfs_vfs + USEMODULE += mtd +endif + +ifneq (,$(filter mtd,$(USEMODULE))) + USEMODULE += mtd_sdcard_default +endif + +ifneq (,$(filter disp_dev,$(USEMODULE))) + USEMODULE += st7796 +endif + +ifneq (,$(filter st7796,$(USEMODULE))) + USEMODULE += lcd_parallel +endif + +ifneq (,$(filter touch_dev,$(USEMODULE))) + USEMODULE += ft5x06 +endif + +ifneq (,$(filter periph_i2c,$(USEMODULE))) + USEMODULE += esp_i2c_hw +endif diff --git a/boards/esp32s3-wt32-sc01-plus/Makefile.features b/boards/esp32s3-wt32-sc01-plus/Makefile.features new file mode 100644 index 0000000000..5aaa9575bd --- /dev/null +++ b/boards/esp32s3-wt32-sc01-plus/Makefile.features @@ -0,0 +1,18 @@ +# actually the board uses a WT32-S3-WROVER-N16R2 module which in fact +# is the same as the ESP32-S3-WROOM-1-N16R2 +CPU_MODEL = esp32s3_wroom_1x_n16r2 + +# additional features provided by the board +FEATURES_PROVIDED += periph_i2c +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_uart +FEATURES_PROVIDED += periph_usbdev + +# unique features provided by the board +FEATURES_PROVIDED += esp_jtag +FEATURES_PROVIDED += sdcard_spi +FEATURES_PROVIDED += highlevel_stdio +FEATURES_PROVIDED += tinyusb_device + +# common board and CPU features +include $(RIOTBOARD)/common/esp32s3/Makefile.features diff --git a/boards/esp32s3-wt32-sc01-plus/Makefile.include b/boards/esp32s3-wt32-sc01-plus/Makefile.include new file mode 100644 index 0000000000..b804cf9187 --- /dev/null +++ b/boards/esp32s3-wt32-sc01-plus/Makefile.include @@ -0,0 +1,5 @@ +PORT_LINUX ?= /dev/ttyACM0 + +OPENOCD_CONFIG ?= board/esp32s3-builtin.cfg + +include $(RIOTBOARD)/common/esp32s3/Makefile.include diff --git a/boards/esp32s3-wt32-sc01-plus/board.c b/boards/esp32s3-wt32-sc01-plus/board.c new file mode 100644 index 0000000000..47e84aac4e --- /dev/null +++ b/boards/esp32s3-wt32-sc01-plus/board.c @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_esp32s3_wt32_sc01_plus + * @{ + * + * @file + * @brief Board specific initializations for ESP32-S3 WT32-SC01 Plus + * + * @author Gunar Schorcht + */ + +#include "board.h" + +void board_init(void) +{ +#if MODULE_ST77XX + gpio_init(LCD_BACKLIGHT, GPIO_OUT); +#endif +#if MODULE_FT5X06 + gpio_init(FT5X06_PARAM_RST_PIN, GPIO_OUT); + gpio_set(FT5X06_PARAM_RST_PIN); +#endif +} diff --git a/boards/esp32s3-wt32-sc01-plus/doc.txt b/boards/esp32s3-wt32-sc01-plus/doc.txt new file mode 100644 index 0000000000..8de39dd0e4 --- /dev/null +++ b/boards/esp32s3-wt32-sc01-plus/doc.txt @@ -0,0 +1,190 @@ +/* + * Copyright (C) 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @defgroup boards_esp32s3_wt32_sc01_plus ESP32-S3 WT32-SC01 Plus + * @ingroup boards_esp32s3 + * @brief Support for the ESP32-S3 WT32-SC01 Plus + * @author Gunar Schorcht + +\section esp32s3_wt32_sc01_plus ESP32-S3 WT32-SC01 Plus + +## Table of Contents {#esp32s3_wt32_sc01_plus_toc} + +1. [Overview](#esp32s3_wt32_sc01_plus_overview) +2. [Hardware](#esp32s3_wt32_sc01_plus_hardware) + 1. [MCU](#esp32s3_wt32_sc01_plus_mcu) + 2. [Board Configuration](#esp32s3_wt32_sc01_plus_board_configuration) + 3. [Board Pinout](#esp32s3_wt32_sc01_plus_pinout) +3. [Flashing the Device](#esp32s3_wt32_sc01_plus_flashing) +4. [Debugging with the Device](#esp32s3_wt32_sc01_plus_debugging) + +## Overview {#esp32s3_wt32_sc01_plus_overview} + +The [Wireless Tag WT32-SC01 Plus](http://en.wireless-tag.com/product-item-26.html) +is a smart panel development platform with the ESP32-S3 SoC. + +\image html https://raw.githubusercontent.com/sukesh-ak/ESP32-TUX/master/datasheet/WT32-SC01-Plus.png "ESP32-S3 WT32-SC01 Plus" width=400px + +It also available on the market as [Smart Panlee SC01 Plus] +(http://en.smartpanle.com/product-item-15.html). + +The ESP32-S3 WT32-SC01 Plus has following main features: +
+|Feature | Support | +|:--------------------------------------------|:-------:| +| ESP32-S3 SoC | yes | +| 16 MB Flash | yes | +| 2 MB QSPI RAM | yes | +| 3.5" LCD Display 480 x 320 with ST7796UI | yes | +| Capacitive Touch Panel with FT6336U | yes | +| SD Card SPI mode | yes | +| USB Type-C | yes | +| RS485 interface | no | +
+\n + +[Back to table of contents](#esp32s3_wt32_sc01_plus_toc) + +## Hardware {#esp32s3_wt32_sc01_plus_hardware} + +This section describes + +- the [MCU](#esp32s3_wt32_sc01_plus_mcu), +- the default [board configuration](#esp32s3_wt32_sc01_plus_board_configuration), +- the [board pinout](#esp32s3_wt32_sc01_plus_pinout). + +[Back to table of contents](#esp32s3_wt32_sc01_plus_toc) + +### MCU {#esp32s3_wt32_sc01_plus_mcu} + +Most features of the ESP32-S3 WT32-SC01 Plus are provided by the ESP32-S3 SoC. +For detailed information about the ESP32-S3 SoC variant (family) and ESP32x +SoCs, see section \ref esp32_mcu_esp32 "ESP32 SoC Series". + +[Back to table of contents](#esp32s3_wt32_sc01_plus_toc) + +### Board Configuration {#esp32s3_wt32_sc01_plus_board_configuration} + +The following table shows the default ESP32-S3 WT32-SC01 Plus configuration, +which is sorted according to the defined functionality of the GPIOs. + +
+Function | GPIOs | Remarks | Configuration +:---------------|:-------|:--------|:---------------------------------- +I2C_DEV(0) SCL | GPIO5 | Touch Panel | \ref esp32_i2c_interfaces "I2C Interfaces" +I2C_DEV(0) SDA | GPIO6 | Touch Panel | \ref esp32_i2c_interfaces "I2C Interfaces" +SPI_DEV(0) CLK | GPIO39 | SD Card | \ref esp32_spi_interfaces "SPI Interfaces" +SPI_DEV(0) MISO | GPIO38 | SD Card | \ref esp32_spi_interfaces "SPI Interfaces" +SPI_DEV(0) MOSI | GPIO40 | SD Card | \ref esp32_spi_interfaces "SPI Interfaces" +SPI_DEV(0) CS0 | GPIO41 | SD Card | \ref esp32_spi_interfaces "SPI Interfaces" +UART_DEV(0) TxD | GPIO43 | DEBUG interface | \ref esp32_uart_interfaces "UART interfaces" +UART_DEV(0) RxD | GPIO44 | DEBUG interface | \ref esp32_uart_interfaces "UART interfaces" +LCD BACKLIGHT | GPIO45 | LCD Backlight | | +LCD RESET | GPIO4 | LCD reset | | +LCD RS | GPIO0 | LCD Command/Data Selection | | +LCD WR | GPIO47 | LCD Write Clock | | +LCD TE | GPIO48 | LCD Frame Sync | | +LCD DB0 | GPIO9 | LCD 8-bit parallel interface D0 | | +LCD DB1 | GPIO46 | LCD 8-bit parallel interface D1 | | +LCD DB2 | GPIO3 | LCD 8-bit parallel interface D2 | | +LCD DB3 | GPIO8 | LCD 8-bit parallel interface D3 | | +LCD DB4 | GPIO18 | LCD 8-bit parallel interface D4 | | +LCD DB5 | GPIO17 | LCD 8-bit parallel interface D5 | | +LCD DB6 | GPIO16 | LCD 8-bit parallel interface D6 | | +LCD DB7 | GPIO15 | LCD 8-bit parallel interface D7 | | +TP INT | GPIO7 | Touch Interrupt | | +TP RST | GPIO4 | Touch Reset | | +
+\n + +[Back to table of contents](#esp32s3_wt32_sc01_plus_toc) + +### Board Pinout {#esp32s3_wt32_sc01_plus_pinout} + +The pinout including the schematics of the board are described in detail in the +[data sheet](https://www.antratek.de/media/wysiwyg/pdf/WT32-SC01-Plus-V1.3-EN.pdf). + +The board has different external interfaces that can be used to connect +external hardware: + +Extended I/O Interface (EXT) + +Pin | Description +----|:----------- +1 | 5V +2 | GND +3 | EXT_IO1 (GPIO10) +4 | EXT_IO2 (GPIO11) +5 | EXT_IO3 (GPIO12) +6 | EXT_IO4 (GPIO13) +7 | EXT_IO5 (GPIO14) +8 | EXT_IO6 (GPIO21) +\n + +RS485 Interface + +Pin | Description +----|:----------- +1 | RS485-A +2 | RS485-B +3 | GND +4 | 5V +\n + +Debug Interface (DEBUG) + +Pin | Description +----|:----------- +1 | 5V +2 | 3V3 +3 | UART_DEV(0) TxD +4 | UART_DEV(0) RxD +5 | RESET (EN) +6 | BOOT (GPIO0) +7 | GND +\n + +[Back to table of contents](#esp32s3_wt32_sc01_plus_toc) + +## Flashing the Device {#esp32s3_wt32_sc01_plus_flashing} + +Since the ESP32-S3 WT32-SC01 Plus does not have a USB-to-Serial chip, the +easiest way to flash it is using the USB Serial/JTAG interface. Just connect +the ESP32-S3 WT32-SC01 Plus to your host computer and use the following command: +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +BOARD=esp32s3-wt32-sc01-plus make flash ... +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Usually the make system resets the ESP32-S3 WT32-SC01 Plus before flashing to +enable the USB Serial/JTAG controller and to reboot the ESP32-S3 in download +mode. + +[Back to table of contents](#esp32s3_wt32_sc01_plus_toc) + +## Debugging with the Device {#esp32s3_wt32_sc01_plus_debugging} + +To be able to debug with the board, it must not use the STDIO via the USB OTG +interface as it does by default. Instead, the STDIO must use the UART interface. +For this purpose, compile and flash the application with the following command: +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +USEMODULE=stdio_uart BOARD=esp32s3-wt32-sc01-plus make flash ... +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +In order to use the STDIO in a terminal in this case, a debugging tool is +available on the market, which is connected to the debug interface of the board. + +@note The debugging tool does not mean that it is used as OpenOCD adapter. It + simply exposes the UART interface. + +For detailed information on debugging an ESP32-S3 board, refer to the section +[JTAG Debugging with ESP32x SoC](#esp32_jtag_debugging). + +[Back to table of contents](#esp32s3_wt32_sc01_plus_toc) + + */ diff --git a/boards/esp32s3-wt32-sc01-plus/include/board.h b/boards/esp32s3-wt32-sc01-plus/include/board.h new file mode 100644 index 0000000000..5b1ff6ab81 --- /dev/null +++ b/boards/esp32s3-wt32-sc01-plus/include/board.h @@ -0,0 +1,155 @@ +/* + * Copyright (C) 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_esp32s3_wt32_sc01_plus + * @brief Board definitions for ESP32-S3 WT32-SC01 Plus boards + * @{ + * + * The board definitions in this file are for the Espressif ESP32-S3 WT32-SC01 Plus. + * + * Any modifications required for specific applications + * can be overridden by \ref esp32_application_specific_configurations + * "application-specific board configuration". + * + * @file + * @author Gunar Schorcht + */ + +#ifndef BOARD_H +#define BOARD_H + +#include + +/** + * @name Button pin definitions + * @{ + */ + +/** + * @brief Default button GPIO pin definition + * + * ESP32-S3 WT32-SC01 Plus boards have a BOOT button connected to GPIO0, which can be + * used as button during normal operation. Since the GPIO0 pin is pulled up, + * the button signal is inverted, i.e., pressing the button will give a + * low signal. + */ +#define BTN0_PIN GPIO0 + +/** + * @brief Default button GPIO mode definition + */ +#define BTN0_MODE GPIO_IN_PU + +/** + * @brief Default interrupt flank definition for the button GPIO + */ +#ifndef BTN0_INT_FLANK +#define BTN0_INT_FLANK GPIO_FALLING +#endif + +/** + * @brief Definition for compatibility with previous versions + */ +#define BUTTON0_PIN BTN0_PIN + +/** @} */ + +/** + * @name LCD display configuration + * + * ESP32-S3 WT32-SC01 Plus uses a 3.5" LCD 480 x 320 pixel display with + * an ST7796UI as driver chip and MCU8080 8-bit parallel interface. + * + * This configuration cannot be changed. + * @{ + */ +#define LCD_SCREEN_WIDTH 480 /**< LCD width */ +#define LCD_SCREEN_HEIGHT 320 /**< LCD height */ + +#ifdef MODULE_ST77XX +#define LCD_DB0 GPIO9 +#define LCD_DB1 GPIO46 +#define LCD_DB2 GPIO3 +#define LCD_DB3 GPIO8 +#define LCD_DB4 GPIO18 +#define LCD_DB5 GPIO17 +#define LCD_DB6 GPIO16 +#define LCD_DB7 GPIO15 +#define LCD_TE GPIO48 +#define LCD_WR GPIO47 +#define LCD_RS GPIO0 +#define LCD_RESET GPIO4 +#define LCD_BACKLIGHT GPIO45 + +#define BACKLIGHT_ON gpio_set(LCD_BACKLIGHT) +#define BACKLIGHT_OFF gpio_clear(LCD_BACKLIGHT) + +#define ST77XX_PARAM_CNTRL ST77XX_CNTRL_ST7796 +#define ST77XX_PARAM_SPI SPI_UNDEF /* parallel interface is used */ +#define ST77XX_PARAM_D0 LCD_DB0 +#define ST77XX_PARAM_D1 LCD_DB1 +#define ST77XX_PARAM_D2 LCD_DB2 +#define ST77XX_PARAM_D3 LCD_DB3 +#define ST77XX_PARAM_D4 LCD_DB4 +#define ST77XX_PARAM_D5 LCD_DB5 +#define ST77XX_PARAM_D6 LCD_DB6 +#define ST77XX_PARAM_D7 LCD_DB7 +#define ST77XX_PARAM_WRX LCD_WR +#define ST77XX_PARAM_RDX GPIO_UNDEF +#define ST77XX_PARAM_DCX LCD_RS +#define ST77XX_PARAM_RST LCD_RESET +#define ST77XX_PARAM_CS GPIO_UNDEF +#define ST77XX_PARAM_RGB 0 +#define ST77XX_PARAM_INVERTED 1 +#define ST77XX_PARAM_ROTATION LCD_MADCTL_MV +#define ST77XX_PARAM_NUM_LINES LCD_SCREEN_WIDTH +#define ST77XX_PARAM_RGB_CHANNELS LCD_SCREEN_HEIGHT +#endif +/** @} */ + +/** + * @name Touch panel configuration + * @{ + */ +#define FT5X06_PARAM_I2C_DEV I2C_DEV(0) /**< I2C device */ +#define FT5X06_PARAM_INT_PIN GPIO7 /**< Interrupt pin */ +#define FT5X06_PARAM_RST_PIN GPIO4 /**< Reset pin */ +#define FT5X06_PARAM_XMAX LCD_SCREEN_WIDTH /**< Max width */ +#define FT5X06_PARAM_YMAX LCD_SCREEN_HEIGHT /**< Max height */ +#define FT5X06_PARAM_TYPE FT5X06_TYPE_FT6X36 /**< Device type */ +#define FT5X06_PARAM_XYCONV (FT5X06_SWAP_XY | FT5X06_MIRROR_Y) /**< Swap XY, then mirror Y */ +/** @} */ + +/** + * @name SD-Card interface configuration + * + * SD-Card interface uses SPI_DEV(1) on this board. + * @{ + */ +#define SDCARD_SPI_PARAM_SPI SPI_DEV(0) +#define SDCARD_SPI_PARAM_CS SPI0_CS0 +#define SDCARD_SPI_PARAM_CLK SPI0_SCK +#define SDCARD_SPI_PARAM_MOSI SPI0_MOSI +#define SDCARD_SPI_PARAM_MISO SPI0_MISO +#define SDCARD_SPI_PARAM_POWER GPIO_UNDEF +/** @} */ + +/* include common board definitions as last step */ +#include "board_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} /* end extern "C" */ +#endif + +#endif /* BOARD_H */ +/** @} */ diff --git a/boards/esp32s3-wt32-sc01-plus/include/gpio_params.h b/boards/esp32s3-wt32-sc01-plus/include/gpio_params.h new file mode 100644 index 0000000000..7ac2fb5566 --- /dev/null +++ b/boards/esp32s3-wt32-sc01-plus/include/gpio_params.h @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +#ifndef GPIO_PARAMS_H +#define GPIO_PARAMS_H + +/** + * @ingroup boards_esp32s3_wt32_sc01_plus + * @brief Board specific configuration of direct mapped GPIOs + * @file + * @author Gunar Schorcht + * @{ + */ + +#include "board.h" +#include "saul/periph.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief LED and Button configuration + */ +static const saul_gpio_params_t saul_gpio_params[] = +{ + { + .name = "BOOT", + .pin = BTN0_PIN, + .mode = BTN0_MODE, + .flags = SAUL_GPIO_INVERTED + }, +}; + +#ifdef __cplusplus +} +#endif + +#endif /* GPIO_PARAMS_H */ +/** @} */ diff --git a/boards/esp32s3-wt32-sc01-plus/include/periph_conf.h b/boards/esp32s3-wt32-sc01-plus/include/periph_conf.h new file mode 100644 index 0000000000..e3e9d9ce1d --- /dev/null +++ b/boards/esp32s3-wt32-sc01-plus/include/periph_conf.h @@ -0,0 +1,113 @@ +/* + * Copyright (C) 2023 Gunar Schorcht + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_esp32s3_wt32_sc01_plus + * @brief Peripheral configurations for ESP32-S3 WT32-SC01 Plus boards + * @{ + * + * The peripheral configurations in this file are for the + * ESP32-S3 WT32-SC01 Plus. + * + * Any modifications required for specific applications + * can be overridden by \ref esp32_application_specific_configurations + * "application-specific board configuration". + * + * For detailed information about the peripheral configuration for ESP32-S3 + * boards, see section \ref esp32_peripherals "Common Peripherals". + * + * @note + * Most definitions can be overridden by an \ref esp32_application_specific_configurations + * "application-specific board configuration" if necessary. + * + * @file + * @author Gunar Schorcht + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name I2C configuration + * + * I2C_DEV(0) is used for the FT6336 touch panel. + * + * @note The GPIOs listed in the configuration are only initialized as I2C + * signals when module `periph_i2c` is used. Otherwise they are not + * allocated and can be used for other purposes. + * + * @{ + */ +#ifndef I2C0_SPEED +#define I2C0_SPEED I2C_SPEED_FAST /**< I2C bus speed of I2C_DEV(0) */ +#endif +#ifndef I2C0_SCL +#define I2C0_SCL GPIO5 /**< SCL signal of I2C_DEV(0) */ +#endif +#ifndef I2C0_SDA +#define I2C0_SDA GPIO6 /**< SDA signal of I2C_DEV(0) */ +#endif +/** @} */ + +/** + * @name SPI configuration + * + * SPI_DEV(0) is used for the SPI SD Card. + * + * @note The GPIOs listed in the configuration are first initialized as SPI + * signals when the corresponding SPI interface is used for the first + * time by either calling the `spi_init_cs` function or the `spi_acquire` + * function. Otherwise they are not allocated as SPI signals before and + * can be used for other purposes as long as the SPI interface is not + * used. + * @{ + */ +#ifndef SPI0_CTRL +#define SPI0_CTRL SPI2_HOST /**< FSPI is used as SPI_DEV(0) */ +#endif +#ifndef SPI0_SCK +#define SPI0_SCK GPIO39 /**< FSPI SCK (pin FSPICLK) */ +#endif +#ifndef SPI0_MISO +#define SPI0_MISO GPIO38 /**< FSPI MISO (pin FSPIQ) */ +#endif +#ifndef SPI0_MOSI +#define SPI0_MOSI GPIO40 /**< FSPI MOSI (pin FSPID) */ +#endif +#ifndef SPI0_CS0 +#define SPI0_CS0 GPIO41 /**< FSPI CS0 (pin FSPICS0) */ +#endif +/** @} */ + +/** + * @name UART configuration + * + * UART_DEV(0) is available at the PMOD2 connector. + * + * @{ + */ +#define UART0_TXD GPIO43 /**< direct I/O pin for UART_DEV(0) TxD, can't be changed */ +#define UART0_RXD GPIO44 /**< direct I/O pin for UART_DEV(0) RxD, can't be changed */ + +/** @} */ + +#ifdef __cplusplus +} /* end extern "C" */ +#endif + +/* include common peripheral definitions as last step */ +#include "periph_conf_common.h" + +#endif /* PERIPH_CONF_H */ +/** @} */