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board/common/saml1x: add common configuration

This commit is contained in:
Dylan Laduranty 2019-01-21 17:07:18 +01:00
parent 9450fa7dc3
commit 99966b318a
8 changed files with 359 additions and 0 deletions

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MODULE = boards_common_saml1x
include $(RIOTBASE)/Makefile.base

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ifneq (,$(filter saul_default,$(USEMODULE)))
USEMODULE += saul_gpio
endif

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# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_adc
FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
# The board MPU family (used for grouping by the CI system)
FEATURES_MCU_GROUP = cortex_m23
include $(RIOTCPU)/saml1x/Makefile.features

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# define the cpu used by the saml11 board
export CPU = saml1x
# set edbg device type
EDBG_DEVICE_TYPE = mchp_cm23
USEMODULE += boards_common_saml1x
include $(RIOTMAKE)/boards/sam0.inc.mk
# add the common header files to the include path
INCLUDES += -I$(RIOTBOARD)/common/saml1x/include

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/*
* Copyright (C) 2019 Mesotic SAS
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_saml1x
* @{
*
* @file board.c
* @brief Board specific implementations for the Microchip
* SAML10 and SAML11 Xplained Pro board
*
* @author Dylan Laduranty <dylan.laduranty@mesotic.com>
*
* @}
*/
#include "cpu.h"
#include "board.h"
#include "periph/gpio.h"
void led_init(void);
void board_init(void)
{
/* initialize the boards LEDs */
led_init();
/* initialize the CPU */
cpu_init();
}
/**
* @brief Initialize the boards on-board LED
*/
void led_init(void)
{
gpio_init(GPIO_PIN(PA, 7), GPIO_OUT);
}

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/*
* Copyright (C) 2019 Mesotic SAS
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @defgroup boards_common_saml1x Microchip SAML1X
* @ingroup boards
* @brief Support for SAML10 and SAML11 boards
* @{
*
* @file
* @brief Board specific definitions for the Microchip
* SAML10 & SAML11 Xplained Pro board.
*
* @author Dylan Laduranty <dylan.laduranty@mesotic.com>
*/
#ifndef BOARD_H
#define BOARD_H
#include "cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name PORT selection macros
* @{
*/
#ifdef CPU_FAM_SAML11
#define _PORT PORT_SEC
#else
#define _PORT PORT
#endif
/** @} */
/**
* @name LED pin definitions and handlers
* @{
*/
#define LED0_PIN GPIO_PIN(PA, 7)
#define LED_PORT _PORT->Group[PA]
#define LED0_MASK (1 << 7)
#define LED0_ON (LED_PORT.OUTCLR.reg = LED0_MASK)
#define LED0_OFF (LED_PORT.OUTSET.reg = LED0_MASK)
#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK)
/** @} */
/**
* @name SW0 (Button) pin definitions
* @{
*/
#define BTN0_PORT _PORT->Group[PA]
#define BTN0_PIN GPIO_PIN(PA, 27)
#define BTN0_MODE GPIO_IN_PU
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H */
/** @} */

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/*
* Copyright (C) 2019 Mesotic SAS
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_saml1x
* @{
*
* @file
* @brief Board specific configuration of direct mapped GPIOs
*
* @author Dylan Laduranty <dylan.laduranty@mesotic.com>
*/
#ifndef GPIO_PARAMS_H
#define GPIO_PARAMS_H
#include "board.h"
#include "saul/periph.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief GPIO pin configuration
*/
static const saul_gpio_params_t saul_gpio_params[] =
{
{
.name = "LED(orange)",
.pin = LED0_PIN,
.mode = GPIO_OUT,
.flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR)
},
{
.name = "Button(SW0)",
.pin = BTN0_PIN,
.mode = BTN0_MODE,
.flags = SAUL_GPIO_INVERTED
},
};
#ifdef __cplusplus
}
#endif
#endif /* GPIO_PARAMS_H */
/** @} */

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/*
* Copyright (C) 2019 Mesotic SAS
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_saml1x
* @{
*
* @file
* @brief Peripheral MCU configuration for the Microchip
* SAML10 & SAML11 Xplained Pro board
*
* @author Dylan Laduranty <dylan.laduranty@mesotic.com>
*/
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief GCLK reference speed
*/
#define CLOCK_CORECLOCK (16000000U)
/**
* @name Timer peripheral configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
/* Timer 0 configuration */
#define TIMER_0_DEV TC0->COUNT32
#define TIMER_0_CHANNELS 1
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_ISR isr_tc0
/** @} */
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{ /* Virtual COM Port */
.dev = &SERCOM2->USART,
.rx_pin = GPIO_PIN(PA,25),
.tx_pin = GPIO_PIN(PA,24),
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
}
};
/* interrupt function name mapping */
#define UART_0_ISR isr_sercom2_2
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @name SPI configuration
* @{
*/
static const spi_conf_t spi_config[] = {
{
.dev = &(SERCOM0->SPI),
.miso_pin = GPIO_PIN(PA, 4),
.mosi_pin = GPIO_PIN(PA, 14),
.clk_pin = GPIO_PIN(PA, 15),
.miso_mux = GPIO_MUX_D,
.mosi_mux = GPIO_MUX_D,
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
}
};
#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
/** @} */
/**
* @name I2C configuration
* @{
*/
static const i2c_conf_t i2c_config[] = {
{
.dev = &(SERCOM1->I2CM),
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PA, 17),
.sda_pin = GPIO_PIN(PA, 16),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0,
.flags = I2C_FLAG_NONE
}
};
#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
/** @} */
/**
* @name RTC configuration
* @{
*/
#define RTC_NUMOF (1)
#define EXTERNAL_OSC32_SOURCE 1
#define INTERNAL_OSC32_SOURCE 0
#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
/** @} */
/**
* @name RTT configuration
* @{
*/
#define RTT_FREQUENCY (32768U)
#define RTT_MAX_VALUE (0xffffffffU)
#define RTT_NUMOF (1)
/** @} */
/**
* @name ADC Configuration
* @{
*/
#define ADC_NUMOF (1U)
/* ADC 0 Default values */
#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */
#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV256
static const adc_conf_chan_t adc_channels[] = {
/* port, pin, muxpos */
{GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN8)},
};
#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H */
/** @} */