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boards/stm32f4*: add Kconfig clock configuration

This commit is contained in:
Alexandre Abadie 2020-09-06 21:59:51 +02:00
parent 342df4bf37
commit 96b79c21f0
No known key found for this signature in database
GPG Key ID: 1C919A403CAE1405
32 changed files with 129 additions and 0 deletions

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@ -17,3 +17,9 @@ config BOARD_COMMON_WEACT_F41XCX
select HAS_PERIPH_UART
select HAS_PERIPH_USBDEV
select HAS_HIGHLEVEL_STDIO
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/stm32/Kconfig"

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@ -12,3 +12,6 @@ FEATURES_PROVIDED += periph_usbdev
# Various other features (if any)
FEATURES_PROVIDED += highlevel_stdio
# weact-f4x1cx boards provide a custom default Kconfig clock configuration
KCONFIG_ADD_CONFIG += $(RIOTBOARD)/common/weact-f4x1cx/clock.config

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@ -0,0 +1,4 @@
# weact-f4x1cx based boards provide a 25MHz HSE so they need a custom PLL config
# to output a 48MHz clock for USB.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_M=25

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@ -16,3 +16,9 @@ config BOARD_F4VI1
# Put defined MCU peripherals here (in alphabetical order)
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/stm32/Kconfig"

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@ -5,3 +5,6 @@ CPU_MODEL = stm32f415rg
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
# f4vi1 provides a custom default Kconfig clock configuration
KCONFIG_ADD_CONFIG += $(RIOTBOARD)/f4vi1/clock.config

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@ -0,0 +1,4 @@
# f4vi1 provides a 16MHz HSE so they need a custom PLL config
# to remain in 180MHz max clock.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_N=90

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@ -22,3 +22,9 @@ config BOARD_MSBIOT
select HAS_PERIPH_SPI
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/stm32/Kconfig"

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@ -10,3 +10,6 @@ FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
# msbiot provides a custom default Kconfig clock configuration
KCONFIG_ADD_CONFIG += $(RIOTBOARD)/msbiot/clock.config

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@ -0,0 +1,5 @@
# msbiot provides a 16MHz HSE so its needs a custom PLL config to output a
# 180MHz clock.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_M=16
CONFIG_CLOCK_PLL_N=360

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@ -25,4 +25,8 @@ config BOARD_NUCLEO_F401RE
select HAS_PERIPH_UART
select HAS_PERIPH_QDEC
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/nucleo64/Kconfig"

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@ -23,4 +23,8 @@ config BOARD_NUCLEO_F410RB
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/nucleo64/Kconfig"

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@ -24,4 +24,8 @@ config BOARD_NUCLEO_F411RE
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/nucleo64/Kconfig"

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@ -25,4 +25,8 @@ config BOARD_NUCLEO_F412ZG
select HAS_PERIPH_UART
select HAS_PERIPH_USBDEV
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/nucleo144/Kconfig"

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@ -28,4 +28,8 @@ config BOARD_NUCLEO_F413ZH
select HAS_PERIPH_UART
select HAS_PERIPH_USBDEV
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/nucleo144/Kconfig"

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@ -25,4 +25,8 @@ config BOARD_NUCLEO_F429ZI
select HAS_PERIPH_UART
select HAS_PERIPH_USBDEV
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/nucleo144/Kconfig"

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@ -30,4 +30,8 @@ config BOARD_NUCLEO_F446RE
select HAS_MOTOR_DRIVER
select HAS_RIOTBOOT
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/nucleo64/Kconfig"

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@ -25,4 +25,8 @@ config BOARD_NUCLEO_F446ZE
select HAS_PERIPH_UART
select HAS_PERIPH_USBDEV
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/nucleo144/Kconfig"

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@ -21,3 +21,9 @@ config BOARD_PYBOARD
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
select HAS_PERIPH_USBDEV
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/stm32/Kconfig"

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@ -9,3 +9,6 @@ FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_usbdev
# pyboard provides a custom default Kconfig clock configuration
KCONFIG_ADD_CONFIG += $(RIOTBOARD)/pyboard/clock.config

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@ -0,0 +1,5 @@
# pyboard provides a 12MHz HSE so its needs a custom PLL config to output a
# 48MHz clock for USB.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_M=12
CONFIG_CLOCK_PLL_N=336

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@ -23,3 +23,9 @@ config BOARD_STM32F429I_DISC1
# Put other features for this board (in alphabetical order)
select HAS_RIOTBOOT
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/stm32/Kconfig"

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@ -24,3 +24,9 @@ config BOARD_STM32F429I_DISCO
# Put other features for this board (in alphabetical order)
select HAS_HIGHLEVEL_STDIO
select HAS_RIOTBOOT
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/stm32/Kconfig"

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@ -28,6 +28,11 @@ config BOARD_STM32F4DISCOVERY
# Various other features (if any)
select HAS_ARDUINO
# Clock configuration
select BOARD_HAS_HSE
source "$(RIOTBOARD)/common/stm32/Kconfig"
config ERROR_MODULES_CONFLICT
default "On stm32f4discovery boards there are the same pins for the DAC and/or SPI_0." if MODULE_PERIPH_SPI && MODULE_PERIPH_DAC
depends on BOARD_STM32F4DISCOVERY

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@ -21,3 +21,9 @@ config BOARD_UBLOX_C030_U201
select HAS_PERIPH_SPI
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
# Clock configuration
select BOARD_HAS_HSE
select BOARD_HAS_LSE
source "$(RIOTBOARD)/common/stm32/Kconfig"

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@ -9,3 +9,6 @@ FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
# ublox-c030-u201 provides a custom default Kconfig clock configuration
KCONFIG_ADD_CONFIG += $(RIOTBOARD)/ublox-c030-u201/clock.config

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@ -0,0 +1,5 @@
# ublox-c030-u201 provides a 12MHz HSE so its needs a custom PLL config to
# output a 180MHz clock.
CONFIG_CUSTOM_PLL_PARAMS=y
CONFIG_CLOCK_PLL_M=12
CONFIG_CLOCK_PLL_N=360

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@ -1,3 +1,6 @@
CPU_MODEL = stm32f401cc
include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features
# weact-f401cc provides a custom default Kconfig clock configuration
KCONFIG_ADD_CONFIG += $(RIOTBOARD)/weact-f401cc/clock.config

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@ -0,0 +1 @@
CONFIG_CLOCK_PLL_N=336

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@ -1,3 +1,6 @@
CPU_MODEL = stm32f401ce
include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features
# weact-f401ce provides a custom default Kconfig clock configuration
KCONFIG_ADD_CONFIG += $(RIOTBOARD)/weact-f401ce/clock.config

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@ -0,0 +1 @@
CONFIG_CLOCK_PLL_N=336

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@ -1,3 +1,6 @@
CPU_MODEL = stm32f411ce
include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features
# weact-f411ce provides a custom default Kconfig clock configuration
KCONFIG_ADD_CONFIG += $(RIOTBOARD)/weact-f411ce/clock.config

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@ -0,0 +1 @@
CONFIG_CLOCK_PLL_N=192