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cpu/lm4f120: reworking timer
This commit is contained in:
Marc
parent
c7d056208f
commit
96444d632e
@ -42,19 +42,26 @@ extern "C" {
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*/
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#define TIMER_NUMOF (2U)
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#define TIMER_0_EN 1
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#define TIMER_1_EN 0
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#define TIMER_1_EN 1
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#define TIMER_IRQ_PRIO 1
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/* Timer 0 configuration */
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/* Timer 0 configuration
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*
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* WTIMER0 is a 32/64bits timer.
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* We use timer_a as TIMER_0
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*/
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#define TIMER_0_CHANNELS 1
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#define TIMER_0_PRESCALER (39U)
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#define TIMER_0_MAX_VALUE (0xffffffff)
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#define TIMER_0_ISR isr_wtimer0a
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#define TIMER_0_IRQ_CHAN Timer0A_IRQn
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/* Timer 1 configuration */
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/* Timer 1 configuration
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*
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* WTIMER1 is a 32/64bits timer.
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* We use timer_a as TIMER_1
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*/
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#define TIMER_1_CHANNELS 1
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#define TIMER_1_PRESCALER (39U)
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#define TIMER_1_MAX_VALUE (0xffffffff)
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#define TIMER_1_ISR isr_wtimer1a
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#define TIMER_1_IRQ_CHAN Timer1A_IRQn
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@ -1,5 +1,6 @@
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/*
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* Copyright (C) 2015 Rakendra Thapa <rakendrathapa@gmail.com
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* 2015 Marc Poulhiès <dkm@kataplop.net>
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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@ -14,6 +15,7 @@
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* @brief Implementation of the low-level timer driver for the LM4F120
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*
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* @author Rakendra Thapa <rakendrathapa@gmail.com>
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* Marc Poulhiès <dkm@kataplop.net>
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*/
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#include <stdint.h>
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@ -27,126 +29,345 @@
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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/* guard file in case no timers are defined */
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#if TIMER_0_EN
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#if TIMER_NUMOF
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/**
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* @brief Struct holding the configuration data
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* @{
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*/
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typedef struct {
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void (*cb)(int); /**< timeout callback */
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void (*cb)(int); /**< timeout callback */
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unsigned int divisor; /**< software clock divisor */
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} timer_conf_t;
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static timer_conf_t config[TIMER_NUMOF];
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/**@}*/
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#include "hw_timer.h"
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/* Missing from driverlib */
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static inline unsigned long
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PRIV_TimerPrescaleSnapshotGet(unsigned long ulbase, unsigned long ultimer) {
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return((ultimer == TIMER_A) ? HWREG(ulbase + TIMER_O_TAPS) :
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HWREG(ulbase + TIMER_O_TBPS));
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}
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static inline unsigned long long _scaled_to_ll_value(unsigned int uncorrected, unsigned int divisor)
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{
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const unsigned long long scaledv = (unsigned long long) uncorrected * divisor;
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return scaledv;
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}
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static inline unsigned int _llvalue_to_scaled_value(unsigned long long corrected, unsigned int divisor)
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{
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const unsigned long long scaledv = corrected / divisor;
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return scaledv;
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}
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int timer_init(tim_t dev, unsigned int us_per_tick, void (*callback)(int))
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{
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if (dev == TIMER_0) {
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config[dev].cb = callback; /* User Function */
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ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_WTIMER0); /* Activate Timer0 */
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WTIMER0_CTL_R &= ~0x00000001; /* Disable timer0A during setup */
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WTIMER0_CFG_R = TIMER_CFG_16_BIT;
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WTIMER0_TAMR_R = TIMER_TAMR_TAMR_PERIOD; /* Configure for periodic mode */
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WTIMER0_TAPR_R = TIMER_0_PRESCALER; /* 1us timer0A */
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WTIMER0_ICR_R = 0x00000001; /* clear timer0A timeout flag */
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WTIMER0_IMR_R |= 0x00000001; /* arm timeout interrupt */
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ROM_IntPrioritySet(INT_WTIMER0A, 32);
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timer_irq_enable(dev);
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timer_start(dev);
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DEBUG("startTimeout Value=0x%lx\n", ROM_TimerValueGet(WTIMER0_BASE, TIMER_A));
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return 1;
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if (dev >= TIMER_NUMOF){
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return -1;
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}
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return -1;
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config[dev].cb = callback; /* User Function */
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config[dev].divisor = us_per_tick * ROM_SysCtlClockGet()/1000000;
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unsigned int sysctl_timer;
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unsigned int timer_base;
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unsigned int timer_side = TIMER_A;
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unsigned int timer_cfg = TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC_UP | TIMER_TAMR_TAMIE;
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unsigned int timer_max_val;
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unsigned int timer_intbit = TIMER_TIMA_TIMEOUT | TIMER_TIMA_MATCH;
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switch(dev){
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#if TIMER_0_EN
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case TIMER_0:
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sysctl_timer = SYSCTL_PERIPH_WTIMER0;
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timer_base = WTIMER0_BASE;
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timer_max_val = TIMER_0_MAX_VALUE;
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break;
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#endif
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#if TIMER_1_EN
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case TIMER_1:
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sysctl_timer = SYSCTL_PERIPH_WTIMER1;
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timer_base = WTIMER1_BASE;
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timer_max_val = TIMER_1_MAX_VALUE;
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break;
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#endif
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default:
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return -1; /* unreachable */
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}
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ROM_SysCtlPeripheralEnable(sysctl_timer);
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ROM_TimerDisable(timer_base, timer_side);
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ROM_TimerConfigure(timer_base, timer_cfg);
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unsigned long long lltimer_val_max = _scaled_to_ll_value(timer_max_val, config[dev].divisor);
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ROM_TimerPrescaleSet(timer_base, timer_side, lltimer_val_max >> 32);
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ROM_TimerLoadSet(timer_base, timer_side, lltimer_val_max & 0xFFFFFFFF);
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ROM_TimerIntClear(timer_base, timer_intbit);
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ROM_TimerIntEnable(timer_base, timer_intbit);
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timer_irq_enable(dev);
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timer_start(dev);
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return 0;
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}
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int timer_set(tim_t dev, int channel, unsigned int timeout)
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{
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if (dev == TIMER_0) {
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unsigned int now = timer_read(dev);
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DEBUG("timer_set now=0x%x\n",now);
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DEBUG("timer_set timeout=0x%x\n", timeout);
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return timer_set_absolute(dev, channel, now+timeout);
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unsigned int corrected_now;
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int retval;
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if (dev >= TIMER_NUMOF){
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return -1;
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}
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return -1;
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corrected_now = timer_read(dev);
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retval = timer_set_absolute(dev, channel, corrected_now+timeout);
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return retval;
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}
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int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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{
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if (dev == TIMER_0) {
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WTIMER0_TAILR_R = 0x00000000 | value; /* period; Reload value */
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DEBUG("Setting timer absolute value=0x%x\n", value);
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return 1;
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unsigned int timer_base;
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unsigned int timer_side = TIMER_A;
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unsigned long long scaledv;
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if (dev >= TIMER_NUMOF){
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return -1;
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}
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return -1;
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switch(dev){
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#if TIMER_0_EN
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case TIMER_0:
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timer_base = WTIMER0_BASE;
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break;
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#endif
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#if TIMER_1_EN
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case TIMER_1:
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timer_base = WTIMER1_BASE;
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break;
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#endif
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default:
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return -1; /* unreachable */
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break;
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}
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ROM_TimerDisable(timer_base, timer_side);
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scaledv = _scaled_to_ll_value(value, config[dev].divisor);
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if (scaledv>>32){
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ROM_TimerPrescaleMatchSet(timer_base, timer_side, scaledv >> 32);
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}
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else {
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ROM_TimerPrescaleMatchSet(timer_base, timer_side, 0);
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}
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ROM_TimerMatchSet(timer_base, timer_side, (unsigned long) (scaledv & 0xFFFFFFFF));
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ROM_TimerEnable(timer_base, timer_side);
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return 1;
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}
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int timer_clear(tim_t dev, int channel)
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{
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if (dev == TIMER_0){
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WTIMER0_ICR_R = TIMER_ICR_TATOCINT;
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return 1;
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unsigned int timer_intbit = TIMER_TIMA_TIMEOUT;
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unsigned int timer_base;
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if (dev >= TIMER_NUMOF){
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return -1;
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}
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return -1;
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switch(dev){
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#if TIMER_0_EN
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case TIMER_0:
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timer_base = WTIMER0_BASE;
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break;
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#endif
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#if TIMER_1_EN
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case TIMER_1:
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timer_base = WTIMER1_BASE;
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break;
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#endif
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default:
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return -1; /* unreachable */
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break;
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}
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ROM_TimerIntClear(timer_base, timer_intbit);
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return 1;
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}
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unsigned int timer_read(tim_t dev)
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{
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if (dev == TIMER_0) {
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unsigned int currTimer0Val=0;
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unsigned int loadTimer0Val=0;
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currTimer0Val = (unsigned int)ROM_TimerValueGet(WTIMER0_BASE, TIMER_A);
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loadTimer0Val = (unsigned int)ROM_TimerLoadGet(WTIMER0_BASE, TIMER_A);
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DEBUG("WTIMER0_TAILR_R=0x%lx\t currTimer0Val=0x%x\t loadTimer0Val=0x%x\n", WTIMER0_TAILR_R, currTimer0Val, loadTimer0Val);
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return (loadTimer0Val - currTimer0Val);
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unsigned int timer_base;
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unsigned int timer_side = TIMER_A;
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unsigned long long high_bits, high_bits_dup;
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unsigned long long low_bits;
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unsigned long long total;
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unsigned int scaled_value;
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if (dev >= TIMER_NUMOF){
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return -1;
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}
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return 0;
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switch(dev){
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#if TIMER_0_EN
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case TIMER_0:
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timer_base = WTIMER0_BASE;
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break;
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#endif
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#if TIMER_1_EN
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case TIMER_1:
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timer_base = WTIMER1_BASE;
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break;
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#endif
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default:
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return -1; /* unreachable */
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break;
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}
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/* handle overflow happening between the 2 register reads */
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do {
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high_bits = ((unsigned long long)PRIV_TimerPrescaleSnapshotGet(timer_base, timer_side)) << 32;
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low_bits = (unsigned long long)ROM_TimerValueGet(timer_base, timer_side);
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high_bits_dup = ((unsigned long long)PRIV_TimerPrescaleSnapshotGet(timer_base, timer_side)) << 32;
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} while (high_bits != high_bits_dup);
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total = high_bits + low_bits;
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DEBUG("Combined %lx:%lx\n", (unsigned long) (total>>32), (unsigned long) (total & 0xFFFFFFFF));
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scaled_value = _llvalue_to_scaled_value(total, config[dev].divisor);
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return scaled_value;
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}
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void timer_start(tim_t dev)
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{
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if (dev == TIMER_0) {
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ROM_TimerEnable(WTIMER0_BASE, TIMER_A);
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unsigned int timer_base;
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unsigned int timer_side = TIMER_A;
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if (dev >= TIMER_NUMOF){
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return ;
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}
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switch(dev){
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#if TIMER_0_EN
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case TIMER_0:
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timer_base = WTIMER0_BASE;
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break;
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#endif
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#if TIMER_1_EN
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case TIMER_1:
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timer_base = WTIMER1_BASE;
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break;
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#endif
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default:
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return; /* unreachable */
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}
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ROM_TimerEnable(timer_base, timer_side);
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}
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void timer_stop(tim_t dev)
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{
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if (dev == TIMER_0) {
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ROM_TimerDisable(WTIMER0_BASE, TIMER_A);
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unsigned int timer_base;
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unsigned int timer_side = TIMER_A;
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if (dev >= TIMER_NUMOF){
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return;
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}
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switch(dev){
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#if TIMER_0_EN
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case TIMER_0:
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timer_base = WTIMER0_BASE;
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break;
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#endif
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#if TIMER_1_EN
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case TIMER_1:
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timer_base = WTIMER1_BASE;
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break;
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#endif
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default:
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return; /* unreachable */
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}
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ROM_TimerDisable(timer_base, timer_side);
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}
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void timer_irq_enable(tim_t dev)
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{
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if (dev == TIMER_0) {
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ROM_IntEnable(INT_WTIMER0A);
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ROM_TimerIntEnable(WTIMER0_BASE, TIMER_TIMA_TIMEOUT);
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unsigned int timer_intbase;
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if (dev >= TIMER_NUMOF){
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return;
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}
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switch(dev){
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#if TIMER_0_EN
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case TIMER_0:
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timer_intbase = INT_WTIMER0A;
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break;
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#endif
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#if TIMER_1_EN
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case TIMER_1:
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timer_intbase = INT_WTIMER1A;
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break;
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#endif
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default:
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return; /* unreachable */
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}
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ROM_IntPrioritySet(timer_intbase, 32);
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ROM_IntEnable(timer_intbase);
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}
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void timer_irq_disable(tim_t dev)
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{
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if (dev == TIMER_0) {
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ROM_IntDisable(INT_WTIMER0A);
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unsigned int timer_base;
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unsigned int timer_intbit = TIMER_TIMA_TIMEOUT;
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unsigned int timer_intbase;
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if (dev >= TIMER_NUMOF){
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return;
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}
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switch(dev){
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#if TIMER_0_EN
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case TIMER_0:
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timer_base = WTIMER0_BASE;
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timer_intbase = INT_WTIMER0A;
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break;
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#endif
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#if TIMER_1_EN
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case TIMER_1:
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timer_base = WTIMER1_BASE;
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timer_intbase = INT_WTIMER1A;
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break;
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#endif
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default:
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return; /* unreachable */
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}
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ROM_IntEnable(timer_intbase);
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ROM_TimerIntDisable(timer_base, timer_intbit);
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}
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#if TIMER_0_EN
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void isr_timer0a(void)
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{
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TIMER0_ICR_R = TIMER_ICR_TATOCINT;
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config[TIMER_0].cb(0);
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if (sched_context_switch_request){
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thread_yield();
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}
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}
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void isr_wtimer0a(void)
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{
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WTIMER0_ICR_R = TIMER_ICR_TATOCINT;
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/* Clears both IT */
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ROM_TimerIntClear(WTIMER0_BASE, TIMER_TIMA_TIMEOUT | TIMER_TIMA_MATCH);
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config[TIMER_0].cb(0);
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if (sched_context_switch_request){
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thread_yield();
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@ -154,5 +375,17 @@ void isr_wtimer0a(void)
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}
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#endif /* TIMER_0_EN */
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#endif /* TIMER_0_EN */
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#if TIMER_1_EN
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void isr_wtimer1a(void)
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{
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ROM_TimerIntClear(WTIMER1_BASE, TIMER_TIMA_TIMEOUT | TIMER_TIMA_MATCH);
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config[TIMER_1].cb(0);
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if (sched_context_switch_request){
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thread_yield();
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}
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}
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#endif /* TIMER_1_EN */
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#endif /* TIMER_NUMOF */
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/** @} */
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