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mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

boards/stmf746g-disco: enable ULPI HS PHY support for USB OTG HS port

This commit is contained in:
Gunar Schorcht 2022-10-02 13:45:44 +02:00
parent 95f74faf6b
commit 958d8c904a
4 changed files with 57 additions and 1 deletions

View File

@ -23,6 +23,7 @@ config BOARD_STM32F746G_DISCO
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
select HAS_PERIPH_USBDEV
select HAS_PERIPH_USBDEV_HS_ULPI
# Clock configuration
select BOARD_HAS_HSE

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@ -26,7 +26,7 @@ Current hardware support:
| I2C | X | I2C1 on PB8/PB9 |
| Ethernet | X | |
| USB OTG FS | X | |
| USB OTG HS | - | |
| USB OTG HS | X | |
| TFT LCD | X | |
| Capacitive touch screen | X | |
| User microphones | - | |

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@ -9,6 +9,7 @@ FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_usbdev
FEATURES_PROVIDED += periph_usbdev_hs_ulpi
# stm32f746g-disco provides a custom default Kconfig clock configuration
KCONFIG_BOARD_CONFIG += $(RIOTBOARD)/stm32f746g-disco/clock.config

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@ -38,7 +38,11 @@
#include "clk_conf.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
#if defined(MODULE_PERIPH_USBDEV_HS_ULPI)
#include "usbdev_synopsys_dwc2.h"
#else
#include "cfg_usb_otg_fs.h"
#endif
#include "mii.h"
#ifdef __cplusplus
@ -265,6 +269,56 @@ static const ltdc_conf_t ltdc_config = {
};
/** @} */
#if defined(MODULE_PERIPH_USBDEV_HS_ULPI) || DOXYGEN
/**
* @name USB OTG FS configuration using ULPI HS PHY
*
* The USB OTG HS peripheral uses a ULPI HS PHY. The configuration of the
* ULPI HS PHY interface is board-specific.
*
* @{
*/
/**
* @brief Enable the high speed USB OTG peripheral
*/
#define DWC2_USB_OTG_HS_ENABLED
/**
* @brief Common USB OTG HS configuration with ULPI HS PHY
*/
static const dwc2_usb_otg_fshs_config_t dwc2_usb_otg_fshs_config[] = {
{
.periph = USB_OTG_HS_PERIPH_BASE,
.type = DWC2_USB_OTG_HS,
.phy = DWC2_USB_OTG_PHY_ULPI,
.rcc_mask = RCC_AHB1ENR_OTGHSEN,
.irqn = OTG_HS_IRQn,
.ahb = AHB1,
.ulpi_af = GPIO_AF10,
.ulpi_clk = GPIO_PIN(PORT_A, 5),
.ulpi_d0 = GPIO_PIN(PORT_A, 3),
.ulpi_d1 = GPIO_PIN(PORT_B, 0),
.ulpi_d2 = GPIO_PIN(PORT_B, 1),
.ulpi_d3 = GPIO_PIN(PORT_B, 10),
.ulpi_d4 = GPIO_PIN(PORT_B, 11),
.ulpi_d5 = GPIO_PIN(PORT_B, 12),
.ulpi_d6 = GPIO_PIN(PORT_B, 13),
.ulpi_d7 = GPIO_PIN(PORT_B, 5),
.ulpi_dir = GPIO_PIN(PORT_C, 2),
.ulpi_stp = GPIO_PIN(PORT_C, 0),
.ulpi_nxt = GPIO_PIN(PORT_H, 4),
}
};
/**
* @brief Number of available USB OTG peripherals
*/
#define USBDEV_NUMOF ARRAY_SIZE(dwc2_usb_otg_fshs_config)
/** @} */
#endif /* defined(MODULE_PERIPH_USBDEV_HS_ULPI) || DOXYGEN */
#ifdef __cplusplus
}
#endif