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use Makefile.base for shell_commands

This commit is contained in:
Oleg Hahm 2013-10-29 10:48:24 +01:00
parent 07db2fd0b5
commit 94454f455d

View File

@ -38,18 +38,5 @@ DEP = $(SRC:%.c=$(BINDIR)%.d)
MODULE =shell_commands
$(BINDIR)$(MODULE).a: $(OBJ)
$(AR) rc $(BINDIR)$(MODULE).a $(OBJ)
include $(RIOTBASE)/Makefile.base
# pull in dependency info for *existing* .o files
-include $(OBJ:.o=.d)
# compile and generate dependency info
$(BINDIR)%.o: %.c
$(CC) $(CFLAGS) $(INCLUDES) -c $*.c -o $(BINDIR)$*.o
$(CC) $(CFLAGS) $(INCLUDES) -MM $*.c > $(BINDIR)$*.d
@printf "$(BINDIR)"|cat - $(BINDIR)$*.d > /tmp/riot_out && mv /tmp/riot_out $(BINDIR)$*.d
# remove compilation products
clean::
rm -f $(BINDIR)$(MODULE).a $(OBJ) $(DEP) $(ASMOBJ)