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cpu/atmega32u4: Relocate default timer config

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This commit is contained in:
Marian Buschsieweke 2020-05-27 19:57:03 +02:00
parent d4e90d3ec8
commit 9138e48746
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GPG Key ID: 61F64C6599B1539F
3 changed files with 55 additions and 26 deletions
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27
boards/common/atmega/include/periph_conf_atmega_common.h
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@ -93,35 +93,10 @@ extern "C" {
* The timer driver only supports the four 16-bit timers (Timer1, Timer3, * The timer driver only supports the four 16-bit timers (Timer1, Timer3,
* Timer4, Timer5), so those are the only ones we can use here. * Timer4, Timer5), so those are the only ones we can use here.
* *
*
* ATmega32U4
* ==========
* The ATmega32U4 has 4 timers. Timer0 and Timer2 are 8 Bit Timers.
*
* The timer driver only supports the two 16-bit timers (Timer1 and
* Timer3), so those are the only ones we can use here.
*
* @{ * @{
*/ */
#ifndef TIMER_NUMOF #ifndef TIMER_NUMOF
#if defined(CPU_ATMEGA32U4) #if defined(CPU_ATMEGA128RFA1) || defined(CPU_ATMEGA256RFR2)
#define TIMER_NUMOF (2U)
#define TIMER_CHANNELS (3)
#define TIMER_0 MEGA_TIMER1
#define TIMER_0_MASK &TIMSK1
#define TIMER_0_FLAG &TIFR1
#define TIMER_0_ISRA TIMER1_COMPA_vect
#define TIMER_0_ISRB TIMER1_COMPB_vect
#define TIMER_0_ISRC TIMER1_COMPC_vect
#define TIMER_1 MEGA_TIMER3
#define TIMER_1_MASK &TIMSK3
#define TIMER_1_FLAG &TIFR3
#define TIMER_1_ISRA TIMER3_COMPA_vect
#define TIMER_1_ISRB TIMER3_COMPB_vect
#define TIMER_1_ISRC TIMER3_COMPC_vect
#elif defined(CPU_ATMEGA128RFA1) || defined(CPU_ATMEGA256RFR2)
#define TIMER_NUMOF (3U) #define TIMER_NUMOF (3U)
#define TIMER_CHANNELS (3) #define TIMER_CHANNELS (3)

51
cpu/atmega32u4/include/default_timer_config.h Normal file
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@ -0,0 +1,51 @@
/*
* Copyright (C) 2017 Thomas Perrot <thomas.perrot@tupi.fr>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_atmega32u4
* @{
*
* @file
* @brief Default ATmega32U4 Timer Config
*
* @author Thomas Perrot <thomas.perrot@tupi.fr>
*
*/
#ifndef DEFAULT_TIMER_CONFIG_H
#define DEFAULT_TIMER_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
#ifndef TIMER_NUMOF
#define TIMER_NUMOF (2U)
#define TIMER_CHANNELS (3)
#define TIMER_0 MEGA_TIMER1
#define TIMER_0_MASK &TIMSK1
#define TIMER_0_FLAG &TIFR1
#define TIMER_0_ISRA TIMER1_COMPA_vect
#define TIMER_0_ISRB TIMER1_COMPB_vect
#define TIMER_0_ISRC TIMER1_COMPC_vect
#define TIMER_1 MEGA_TIMER3
#define TIMER_1_MASK &TIMSK3
#define TIMER_1_FLAG &TIFR3
#define TIMER_1_ISRA TIMER3_COMPA_vect
#define TIMER_1_ISRB TIMER3_COMPB_vect
#define TIMER_1_ISRC TIMER3_COMPC_vect
#endif /* TIMER_NUMOF */
#ifdef __cplusplus
}
#endif
#endif /* DEFAULT_TIMER_CONFIG_H */
/** @} */

3
cpu/atmega32u4/include/periph_cpu.h
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@ -66,5 +66,8 @@ enum {
} }
#endif #endif
#include "periph_conf.h"
#include "default_timer_config.h"
#endif /* PERIPH_CPU_H */ #endif /* PERIPH_CPU_H */
/** @} */ /** @} */