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Merge #19050

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19050: boards/common/cc26xx cc13xx: clean up and fix flash configs r=benpicco a=maribu

### Contribution description

- Add support for XDS110 debugger via `OPENOCD_DEBUG_ADAPTER=xds110`
- Clean up OpenOCD configs in `boards/common/cc26xx_cc13xx`
    - No longer hardcode the debugger to xds110, but use `OPENOCD_DEBUG_ADATER ?= xds110`
    - Add support for cc13x0, cc13x2, cc26x0
- `boards/cc2650*`: drop custom OpenOCD config in favor of shared one
- add variables needed to support flashing with `PROGRAMMER=jlink`
- allow specifying a custom OpenOCD command to bring the device to a halt state, as the default `reset halt` (which causes a second reset) is causing issues with the ICEPick JTAG routers in the CC26xx - CC13xx devices
- Use `halt` instead of `reset halt` for CC26xx / CC13xx boards in OpenOCD to avoid issues in flashing

### Testing procedure

```
make BOARD=cc2650-launchpad -C examples/default flash
```

Should now work. The same should still work for other cc26xx cc13xx boards.

### Issues/PRs references

Partially fixes: https://github.com/RIOT-OS/RIOT/issues/18750

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
This commit is contained in:
bors[bot] 2023-01-13 00:51:31 +00:00 committed by GitHub
commit 89ef35f9c6
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14 changed files with 98 additions and 117 deletions
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2
boards/cc2650-launchpad/Makefile.include
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@ -1,6 +1,4 @@
XDEBUGGER = XDS110
OPENOCD_CONFIG ?= $(BOARDDIR)/dist/openocd.cfg
# configure the flash tool
include $(RIOTBOARD)/common/cc26xx_cc13xx/Makefile.include

43
boards/cc2650-launchpad/dist/openocd.cfg vendored
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@ -1,43 +0,0 @@
# Config for Texas Instruments low power SoC CC26xx family
adapter_khz 100
source [find target/icepick.cfg]
source [find target/ti-cjtag.cfg]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME cc26xx
}
#
# Main DAP
#
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4BA00477
}
jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
#
# ICEpick-C (JTAG route controller)
#
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x1B99A02F
}
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
# A start sequence is needed to change from cJTAG (Compact JTAG) to
# 4-pin JTAG before talking via JTAG commands
jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
#
# Cortex M3 target
#
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.dap

2
boards/cc2650stk/Makefile.include
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@ -1,6 +1,4 @@
XDEBUGGER = XDS110
OPENOCD_CONFIG ?= $(BOARDDIR)/dist/openocd.cfg
# configure the flash tool
include $(RIOTBOARD)/common/cc26xx_cc13xx/Makefile.include

43
boards/cc2650stk/dist/openocd.cfg vendored
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@ -1,43 +0,0 @@
# Config for Texas Instruments low power SoC CC26xx family
adapter_khz 100
source [find target/icepick.cfg]
source [find target/ti-cjtag.cfg]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME cc26xx
}
#
# Main DAP
#
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4BA00477
}
jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
#
# ICEpick-C (JTAG route controller)
#
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x1B99A02F
}
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
# A start sequence is needed to change from cJTAG (Compact JTAG) to
# 4-pin JTAG before talking via JTAG commands
jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
#
# Cortex M3 target
#
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.dap

41
boards/common/cc26xx_cc13xx/Makefile.include
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@ -13,5 +13,44 @@ PROGRAMMERS_SUPPORTED += openocd uniflash
# embedded debugger of these launchpad boards.
TTY_BOARD_FILTER := --model XDS110 --iface-num 0
OPENOCD_CONFIG ?= $(RIOTBOARD)/common/cc26xx_cc13xx/dist/openocd.cfg
UNIFLASH_CONFIG ?= $(RIOTBOARD)/common/cc26xx_cc13xx/dist
OPENOCD_DEBUG_ADAPTER ?= xds110
# Work around a bug in the CC26xx / CC13xx that is triggered by 'reset halt'.
# This results in the CC26xx / CC13xx being flash-able again, but it may race
# against the target firmware installing IRQ handlers that may trigger while
# the device is being flashed, which is bound to cause unpleasantness. But
# flashing working fine most of the time is better than flashing working not
# at all...
OPENOCD_CMD_RESET_HALT ?= -c 'halt'
ifneq (,$(filter cc13x0%,$(CPU_MODEL)))
DEFAULT_OPENOCD_CONFIG := $(RIOTBASE)/boards/common/cc26xx_cc13xx/dist/openocd_cc13x0.cfg
DEFAULT_JLINK_DEVICE := CC13xx
endif
ifneq (,$(filter cc13x2%,$(CPU_MODEL)))
DEFAULT_OPENOCD_CONFIG := $(RIOTBASE)/boards/common/cc26xx_cc13xx/dist/openocd_cc13x2.cfg
DEFAULT_JLINK_DEVICE := CC13xx
endif
ifneq (,$(filter cc26x0%,$(CPU_MODEL)))
DEFAULT_OPENOCD_CONFIG := $(RIOTBASE)/boards/common/cc26xx_cc13xx/dist/openocd_cc26x0.cfg
DEFAULT_JLINK_DEVICE := CC26xx
endif
ifneq (,$(filter cc26x2%,$(CPU_MODEL)))
DEFAULT_OPENOCD_CONFIG := $(RIOTBASE)/boards/common/cc26xx_cc13xx/dist/openocd_cc26x2.cfg
DEFAULT_JLINK_DEVICE := CC26xx
endif
# if no openocd specific configuration file, check for default locations:
# 1. Using the default dist/openocd.cfg (automatically set by openocd.sh)
# 2. Using the common cpu specific config file
ifeq (,$(OPENOCD_CONFIG))
# if no openocd default configuration is provided by the board,
# use the default cc26xx / cc13xx config
ifeq (0,$(words $(wildcard $(BOARDDIR)/dist/openocd.cfg)))
OPENOCD_CONFIG := $(DEFAULT_OPENOCD_CONFIG)
endif
endif
JLINK_DEVICE ?= $(DEFAULT_JLINK_DEVICE)
JLINK_IF ?= jtag

11
boards/common/cc26xx_cc13xx/dist/openocd.cfg vendored
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@ -1,11 +0,0 @@
source [find interface/xds110.cfg]
transport select jtag
gdb_memory_map enable
gdb_flash_program enable
source [find target/ti_cc26x2.cfg]
adapter_nsrst_assert_width 250
adapter_nsrst_delay 400
adapter_khz 1000

1
boards/common/cc26xx_cc13xx/dist/openocd_cc13x0.cfg vendored Normal file
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@ -0,0 +1 @@
source [find target/ti_cc13x0.cfg]

1
boards/common/cc26xx_cc13xx/dist/openocd_cc13x2.cfg vendored Normal file
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@ -0,0 +1 @@
source [find target/ti_cc13x2.cfg]

1
boards/common/cc26xx_cc13xx/dist/openocd_cc26x0.cfg vendored Normal file
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@ -0,0 +1 @@
source [find target/ti_cc26x0.cfg]

1
boards/common/cc26xx_cc13xx/dist/openocd_cc26x2.cfg vendored Normal file
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@ -0,0 +1 @@
source [find target/ti_cc26x2.cfg]

52
cpu/cc26xx_cc13xx/doc.txt
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@ -68,11 +68,29 @@ that provides programming, flashing and debugging capabilities.
It can either use proprietary Texas Instruments tools for programming, or OpenOCD.
### Using OpenOCD
### Using Upstream OpenOCD
To use OpenOCD with the XDS110 you need to use the an special version of
OpenOCD made by TI (upstream version is not _yet_ compatible). You can
clone and compile it from source:
OpenOCD is the default programmer and debugger. Hence, flashing can be done
by navigating to the application directory and running:
```
make flash BOARD=<CC26xx-or-CC13xx-based-board>
```
@warning A reliable and robust sequence to reset the CC26xx / CC13xx from
upstream OpenOCD is not yet implemented. As a result, OpenOCD will
halt the MCU for flashing without reset. This may result in IRQ
handlers being already set up and responding to IRQs that trigger
while flashing. Hence, flashing is likely not 100% reliable.
@note By default the XDS110 debug adapter is used, which is the debugger
TI integrates into is developments boards. This can be overwritten
by setting `OPENOCD_DEBUG_ADAPTER` to a different debugger.
### Using TI's OpenOCD Fork
TI maintains an outdated fork of OpenOCD that contains patches and special
handling that have not upstreamed yet. It can be build using:
```
# Clone into the openocd-ti folder
@ -87,17 +105,25 @@ make
sudo make install
```
@note Sometimes OpenOCD may stop working when the firmware on the XDS110
is updated (when using Uniflash, happens without user intervention). With that
in mind, it's encouraged to either enable the ROM bootloader backdoor to enable
serial programming or the installation of TI Uniflash as a fallback. See
[Using Uniflash](#cc26xx_cc13xx_uniflash)
@warning Sometimes OpenOCD may stop working when the firmware on the XDS110
is updated (when using Uniflash, happens without user intervention).
With that in mind, it's encouraged to either enable the ROM
bootloader backdoor to enable serial programming or the
installation of TI Uniflash as a fallback. See
[Using Uniflash](#cc26xx_cc13xx_uniflash)
#### Setting up the environment
@note With `OPENOCD_CMD_RESET_HALT="-c 'reset halt'"` the default reset
sequence can be restored. This may work with TI's OpenOCD fork.
To flash a board using OpenOCD you can use do it so by setting the `PROGRAMMER`
environment variable directly in the make command line or in your shell
nitialization
Otherwise, usage is identical with the upstream version of OpenOCD.
### using J-Link
By passing (or exporting) `PROGRAMMER=jlink` J-Link can be used to flash the
board. This requires a J-Link compatible programmer / debugger. Since the
XDS110 that TI's development boards use is not compatible, an external
programmer has to be used. The upside is that flashing appears to be reliable
with that.
### Using Uniflash

6
dist/tools/openocd/openocd.sh vendored
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@ -113,6 +113,8 @@
: ${OPENOCD_DBG_EXTRA_CMD:=}
# command used to reset the board
: ${OPENOCD_CMD_RESET_RUN:="-c 'reset run'"}
# command used to halt the board
: ${OPENOCD_CMD_RESET_HALT:="-c 'reset halt'"}
# Select core on multi-core processors.
: ${OPENOCD_CORE:=}
# Set to any value to skip verifying after flashing.
@ -241,7 +243,7 @@ _flash_list_raw() {
${OPENOCD_EXTRA_RESET_INIT} \
-c 'init' \
-c 'targets' \
-c 'reset halt' \
${OPENOCD_CMD_RESET_HALT} \
-c 'flash probe 0' \
-c 'flash list' \
-c 'shutdown'" 2>&1 && return
@ -366,7 +368,7 @@ do_flash() {
-c 'gdb_port 0' \
-c 'init' \
-c 'targets' \
-c 'reset halt' \
${OPENOCD_CMD_RESET_HALT} \
${OPENOCD_PRE_FLASH_CMDS} \
-c 'flash write_image erase \"${IMAGE_FILE}\" ${IMAGE_OFFSET} ${IMAGE_TYPE}' \
${OPENOCD_PRE_VERIFY_CMDS} \

6
makefiles/tools/openocd-adapters/xds110.inc.mk Normal file
View File

@ -0,0 +1,6 @@
# TI XDS110 debug adapter (available both as embedded debugger e.g. in the
# cc13xx-launchpad and cc26xx-launchpad boards or standalone version)
OPENOCD_TRANSPORT ?= jtag
OPENOCD_ADAPTER_INIT ?= -c 'source [find interface/xds110.cfg]'

5
makefiles/tools/openocd.inc.mk
View File

@ -38,6 +38,11 @@ ifneq (,$(OPENOCD_CMD_RESET_RUN))
$(call target-export-variables,reset,OPENOCD_CMD_RESET_RUN)
endif
ifneq (,$(OPENOCD_CMD_RESET_HALT))
# Export OPENOCD_CMD_RESET_HALT only to the flash targets
$(call target-export-variables,flash%,OPENOCD_CMD_RESET_HALT)
endif
OPENOCD_DEBUG_TARGETS = debug debugr debug-server
ifneq (,$(OPENOCD_DBG_EXTRA_CMD))