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boards/hifive1*: provide and configure SPI feature

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This commit is contained in:
Alexandre Abadie 2019-12-16 10:25:55 +01:00
parent 532cdc64ff
commit 8405fbe611
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GPG Key ID: 1C919A403CAE1405
4 changed files with 36 additions and 2 deletions
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2
boards/hifive1/Makefile.features
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@ -5,6 +5,6 @@ CPU_MODEL = fe310_g000
#FEATURES_PROVIDED += periph_pwm #FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt FEATURES_PROVIDED += periph_rtt
#FEATURES_PROVIDED += periph_spi FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart FEATURES_PROVIDED += periph_uart

17
boards/hifive1/include/periph_conf.h
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@ -109,6 +109,23 @@ static const uart_conf_t uart_config[] = {
#define UART_NUMOF ARRAY_SIZE(uart_config) #define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */ /** @} */
/**
* @name SPI device configuration
*
* @{
*/
static const spi_conf_t spi_config[] = {
{
.addr = SPI1_CTRL_ADDR,
.mosi = GPIO_PIN(0, 3), /* D11 */
.miso = GPIO_PIN(0, 4), /* D12 */
.sclk = GPIO_PIN(0, 5), /* D13 */
},
};
#define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */
/** /**
* @name RTT/RTC configuration * @name RTT/RTC configuration
* *

2
boards/hifive1b/Makefile.features
View File

@ -6,7 +6,7 @@ CPU_MODEL = fe310_g002
#FEATURES_PROVIDED += periph_pwm #FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt FEATURES_PROVIDED += periph_rtt
#FEATURES_PROVIDED += periph_spi FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart FEATURES_PROVIDED += periph_uart

17
boards/hifive1b/include/periph_conf.h
View File

@ -110,6 +110,23 @@ static const uart_conf_t uart_config[] = {
#define UART_NUMOF ARRAY_SIZE(uart_config) #define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */ /** @} */
/**
* @name SPI device configuration
*
* @{
*/
static const spi_conf_t spi_config[] = {
{
.addr = SPI1_CTRL_ADDR,
.mosi = GPIO_PIN(0, 3), /* D11 */
.miso = GPIO_PIN(0, 4), /* D12 */
.sclk = GPIO_PIN(0, 5), /* D13 */
},
};
#define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */
/** /**
* @name RTT/RTC configuration * @name RTT/RTC configuration
* *