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mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

boards/efm32: remove secondary UART

The secondary UART is used as the first SPI peripheral, that is
initialized on boot. Therefore, it doesn't make sense to add it as a
secondary UART.
This commit is contained in:
Bas Stottelaar 2020-10-27 00:32:29 +01:00
parent c79c192ba4
commit 8383d09d20
4 changed files with 4 additions and 42 deletions

View File

@ -192,15 +192,6 @@ static const uart_conf_t uart_config[] = {
.cmu = cmuClock_USART0,
.irq = USART0_RX_IRQn
},
{
.dev = USART1,
.rx_pin = GPIO_PIN(PC, 7),
.tx_pin = GPIO_PIN(PC, 6),
.loc = USART_ROUTELOC0_RXLOC_LOC11 |
USART_ROUTELOC0_TXLOC_LOC11,
.cmu = cmuClock_USART1,
.irq = USART1_RX_IRQn
},
{
.dev = LEUART0,
.rx_pin = GPIO_PIN(PD, 11),
@ -214,8 +205,7 @@ static const uart_conf_t uart_config[] = {
#define UART_NUMOF ARRAY_SIZE(uart_config)
#define UART_0_ISR_RX isr_usart0_rx
#define UART_1_ISR_RX isr_usart1_rx
#define UART_2_ISR_RX isr_leuart0
#define UART_1_ISR_RX isr_leuart0
/** @} */
#ifdef __cplusplus

View File

@ -192,15 +192,6 @@ static const uart_conf_t uart_config[] = {
.cmu = cmuClock_USART0,
.irq = USART0_RX_IRQn
},
{
.dev = USART1,
.rx_pin = GPIO_PIN(PC, 6),
.tx_pin = GPIO_PIN(PC, 7),
.loc = USART_ROUTELOC0_RXLOC_LOC11 |
USART_ROUTELOC0_TXLOC_LOC11,
.cmu = cmuClock_USART1,
.irq = USART1_RX_IRQn
},
{
.dev = LEUART0,
.rx_pin = GPIO_PIN(PD, 11),
@ -214,8 +205,7 @@ static const uart_conf_t uart_config[] = {
#define UART_NUMOF ARRAY_SIZE(uart_config)
#define UART_0_ISR_RX isr_usart0_rx
#define UART_1_ISR_RX isr_usart1_rx
#define UART_2_ISR_RX isr_leuart0
#define UART_1_ISR_RX isr_leuart0
/** @} */
#ifdef __cplusplus

View File

@ -245,14 +245,6 @@ static const uart_conf_t uart_config[] = {
.cmu = cmuClock_UART0,
.irq = UART0_RX_IRQn
},
{
.dev = USART1,
.rx_pin = GPIO_PIN(PD, 1),
.tx_pin = GPIO_PIN(PD, 0),
.loc = USART_ROUTE_LOCATION_LOC1,
.cmu = cmuClock_USART1,
.irq = USART1_RX_IRQn
},
{
.dev = LEUART0,
.rx_pin = GPIO_PIN(PD, 5),
@ -265,8 +257,7 @@ static const uart_conf_t uart_config[] = {
#define UART_NUMOF ARRAY_SIZE(uart_config)
#define UART_0_ISR_RX isr_uart0_rx
#define UART_1_ISR_RX isr_usart1_rx
#define UART_2_ISR_RX isr_leuart0
#define UART_1_ISR_RX isr_leuart0
/** @} */
#ifdef __cplusplus

View File

@ -245,14 +245,6 @@ static const uart_conf_t uart_config[] = {
.cmu = cmuClock_UART0,
.irq = UART0_RX_IRQn
},
{
.dev = USART1,
.rx_pin = GPIO_PIN(PD, 1),
.tx_pin = GPIO_PIN(PD, 0),
.loc = USART_ROUTE_LOCATION_LOC1,
.cmu = cmuClock_USART1,
.irq = USART1_RX_IRQn
},
{
.dev = LEUART0,
.rx_pin = GPIO_PIN(PD, 5),
@ -265,8 +257,7 @@ static const uart_conf_t uart_config[] = {
#define UART_NUMOF ARRAY_SIZE(uart_config)
#define UART_0_ISR_RX isr_uart0_rx
#define UART_1_ISR_RX isr_usart1_rx
#define UART_2_ISR_RX isr_leuart0
#define UART_1_ISR_RX isr_leuart0
/** @} */
#ifdef __cplusplus