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drivers/at86rf2xx: add HAVE_SUBGHZ macro
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58ce0743c6
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@ -206,7 +206,7 @@ void at86rf2xx_reset(at86rf2xx_t *dev)
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/* enable safe mode (protect RX FIFO until reading data starts) */
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2,
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AT86RF2XX_TRX_CTRL_2_MASK__RX_SAFE_MODE);
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#ifdef MODULE_AT86RF212B
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#if AT86RF2XX_HAVE_SUBGHZ
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at86rf2xx_set_page(dev, AT86RF2XX_DEFAULT_PAGE);
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#endif
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@ -151,7 +151,7 @@ void at86rf2xx_set_chan(at86rf2xx_t *dev, uint8_t channel)
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uint8_t at86rf2xx_get_page(const at86rf2xx_t *dev)
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{
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#ifdef MODULE_AT86RF212B
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#if AT86RF2XX_HAVE_SUBGHZ
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return dev->page;
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#else
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(void) dev;
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@ -161,7 +161,7 @@ uint8_t at86rf2xx_get_page(const at86rf2xx_t *dev)
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void at86rf2xx_set_page(at86rf2xx_t *dev, uint8_t page)
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{
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#ifdef MODULE_AT86RF212B
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#if AT86RF2XX_HAVE_SUBGHZ
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if ((page == 0) || (page == 2)) {
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dev->page = page;
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at86rf2xx_configure_phy(dev);
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@ -174,7 +174,7 @@ void at86rf2xx_set_page(at86rf2xx_t *dev, uint8_t page)
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uint8_t at86rf2xx_get_phy_mode(at86rf2xx_t *dev)
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{
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#ifdef MODULE_AT86RF212B
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#if AT86RF2XX_HAVE_SUBGHZ
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uint8_t ctrl2;
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ctrl2 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__TRX_CTRL_2);
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if (ctrl2 & AT86RF2XX_TRX_CTRL_2_MASK__BPSK_OQPSK) {
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@ -230,7 +230,7 @@ void at86rf2xx_set_pan(at86rf2xx_t *dev, uint16_t pan)
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int16_t at86rf2xx_get_txpower(const at86rf2xx_t *dev)
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{
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#ifdef MODULE_AT86RF212B
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#if AT86RF2XX_HAVE_SUBGHZ
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uint8_t txpower = at86rf2xx_reg_read(dev, AT86RF2XX_REG__PHY_TX_PWR);
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DEBUG("txpower value: %x\n", txpower);
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return _tx_pow_to_dbm_212b(dev->netdev.chan, dev->page, txpower);
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@ -251,7 +251,7 @@ void at86rf2xx_set_txpower(const at86rf2xx_t *dev, int16_t txpower)
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else if (txpower > AT86RF2XX_TXPOWER_MAX) {
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txpower = AT86RF2XX_TXPOWER_MAX;
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}
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#ifdef MODULE_AT86RF212B
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#if AT86RF2XX_HAVE_SUBGHZ
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if (dev->netdev.chan == 0) {
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_TX_PWR,
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dbm_to_tx_pow_868[txpower]);
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@ -389,7 +389,7 @@ int8_t at86rf2xx_get_ed_level(at86rf2xx_t *dev)
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{
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uint8_t tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__PHY_ED_LEVEL);
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#if MODULE_AT86RF212B
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#if AT86RF2XX_HAVE_SUBGHZ
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/* AT86RF212B has different scale than the other variants */
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int8_t ed = (int8_t)(((int16_t)tmp * 103) / 100) + RSSI_BASE_VAL;
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#else
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@ -169,7 +169,7 @@ void at86rf2xx_configure_phy(at86rf2xx_t *dev)
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/* we must be in TRX_OFF before changing the PHY configuration */
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uint8_t prev_state = at86rf2xx_set_state(dev, AT86RF2XX_STATE_TRX_OFF);
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#ifdef MODULE_AT86RF212B
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#if AT86RF2XX_HAVE_SUBGHZ
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/* The TX power register must be updated after changing the channel if
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* moving between bands. */
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int16_t txpower = at86rf2xx_get_txpower(dev);
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@ -211,7 +211,7 @@ void at86rf2xx_configure_phy(at86rf2xx_t *dev)
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phy_cc_cca |= (dev->netdev.chan & AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL);
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_CC_CCA, phy_cc_cca);
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#ifdef MODULE_AT86RF212B
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#if AT86RF2XX_HAVE_SUBGHZ
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/* Update the TX power register to achieve the same power (in dBm) */
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at86rf2xx_set_txpower(dev, txpower);
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#endif
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@ -533,7 +533,7 @@ static int _set(netdev_t *netdev, netopt_t opt, const void *val, size_t len)
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case NETOPT_CHANNEL_PAGE:
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assert(len == sizeof(uint16_t));
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uint8_t page = (((const uint16_t *)val)[0]) & UINT8_MAX;
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#ifdef MODULE_AT86RF212B
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#if AT86RF2XX_HAVE_SUBGHZ
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if ((page != 0) && (page != 2)) {
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res = -EINVAL;
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}
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@ -116,6 +116,15 @@ extern "C" {
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#define AT86RF2XX_IS_PERIPH (0)
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#endif
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/**
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* @brief Support for SubGHz bands
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*/
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#ifdef MODULE_AT86RF212B
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#define AT86RF2XX_HAVE_SUBGHZ (1)
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#else
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#define AT86RF2XX_HAVE_SUBGHZ (0)
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#endif
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#if defined(DOXYGEN) || defined(MODULE_AT86RF232) || defined(MODULE_AT86RF233) || defined(MODULE_AT86RFR2)
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/**
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* @brief Frame retry counter reporting
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