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drivers/at86rf2xx: add HAVE_SUBGHZ macro

This commit is contained in:
Jose Alamos 2022-11-24 17:21:44 +01:00
parent 58ce0743c6
commit 82d3324e63
No known key found for this signature in database
GPG Key ID: F483EB800EF89DD9
5 changed files with 19 additions and 10 deletions

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@ -206,7 +206,7 @@ void at86rf2xx_reset(at86rf2xx_t *dev)
/* enable safe mode (protect RX FIFO until reading data starts) */
at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2,
AT86RF2XX_TRX_CTRL_2_MASK__RX_SAFE_MODE);
#ifdef MODULE_AT86RF212B
#if AT86RF2XX_HAVE_SUBGHZ
at86rf2xx_set_page(dev, AT86RF2XX_DEFAULT_PAGE);
#endif

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@ -151,7 +151,7 @@ void at86rf2xx_set_chan(at86rf2xx_t *dev, uint8_t channel)
uint8_t at86rf2xx_get_page(const at86rf2xx_t *dev)
{
#ifdef MODULE_AT86RF212B
#if AT86RF2XX_HAVE_SUBGHZ
return dev->page;
#else
(void) dev;
@ -161,7 +161,7 @@ uint8_t at86rf2xx_get_page(const at86rf2xx_t *dev)
void at86rf2xx_set_page(at86rf2xx_t *dev, uint8_t page)
{
#ifdef MODULE_AT86RF212B
#if AT86RF2XX_HAVE_SUBGHZ
if ((page == 0) || (page == 2)) {
dev->page = page;
at86rf2xx_configure_phy(dev);
@ -174,7 +174,7 @@ void at86rf2xx_set_page(at86rf2xx_t *dev, uint8_t page)
uint8_t at86rf2xx_get_phy_mode(at86rf2xx_t *dev)
{
#ifdef MODULE_AT86RF212B
#if AT86RF2XX_HAVE_SUBGHZ
uint8_t ctrl2;
ctrl2 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__TRX_CTRL_2);
if (ctrl2 & AT86RF2XX_TRX_CTRL_2_MASK__BPSK_OQPSK) {
@ -230,7 +230,7 @@ void at86rf2xx_set_pan(at86rf2xx_t *dev, uint16_t pan)
int16_t at86rf2xx_get_txpower(const at86rf2xx_t *dev)
{
#ifdef MODULE_AT86RF212B
#if AT86RF2XX_HAVE_SUBGHZ
uint8_t txpower = at86rf2xx_reg_read(dev, AT86RF2XX_REG__PHY_TX_PWR);
DEBUG("txpower value: %x\n", txpower);
return _tx_pow_to_dbm_212b(dev->netdev.chan, dev->page, txpower);
@ -251,7 +251,7 @@ void at86rf2xx_set_txpower(const at86rf2xx_t *dev, int16_t txpower)
else if (txpower > AT86RF2XX_TXPOWER_MAX) {
txpower = AT86RF2XX_TXPOWER_MAX;
}
#ifdef MODULE_AT86RF212B
#if AT86RF2XX_HAVE_SUBGHZ
if (dev->netdev.chan == 0) {
at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_TX_PWR,
dbm_to_tx_pow_868[txpower]);
@ -389,7 +389,7 @@ int8_t at86rf2xx_get_ed_level(at86rf2xx_t *dev)
{
uint8_t tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__PHY_ED_LEVEL);
#if MODULE_AT86RF212B
#if AT86RF2XX_HAVE_SUBGHZ
/* AT86RF212B has different scale than the other variants */
int8_t ed = (int8_t)(((int16_t)tmp * 103) / 100) + RSSI_BASE_VAL;
#else

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@ -169,7 +169,7 @@ void at86rf2xx_configure_phy(at86rf2xx_t *dev)
/* we must be in TRX_OFF before changing the PHY configuration */
uint8_t prev_state = at86rf2xx_set_state(dev, AT86RF2XX_STATE_TRX_OFF);
#ifdef MODULE_AT86RF212B
#if AT86RF2XX_HAVE_SUBGHZ
/* The TX power register must be updated after changing the channel if
* moving between bands. */
int16_t txpower = at86rf2xx_get_txpower(dev);
@ -211,7 +211,7 @@ void at86rf2xx_configure_phy(at86rf2xx_t *dev)
phy_cc_cca |= (dev->netdev.chan & AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL);
at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_CC_CCA, phy_cc_cca);
#ifdef MODULE_AT86RF212B
#if AT86RF2XX_HAVE_SUBGHZ
/* Update the TX power register to achieve the same power (in dBm) */
at86rf2xx_set_txpower(dev, txpower);
#endif

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@ -533,7 +533,7 @@ static int _set(netdev_t *netdev, netopt_t opt, const void *val, size_t len)
case NETOPT_CHANNEL_PAGE:
assert(len == sizeof(uint16_t));
uint8_t page = (((const uint16_t *)val)[0]) & UINT8_MAX;
#ifdef MODULE_AT86RF212B
#if AT86RF2XX_HAVE_SUBGHZ
if ((page != 0) && (page != 2)) {
res = -EINVAL;
}

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@ -116,6 +116,15 @@ extern "C" {
#define AT86RF2XX_IS_PERIPH (0)
#endif
/**
* @brief Support for SubGHz bands
*/
#ifdef MODULE_AT86RF212B
#define AT86RF2XX_HAVE_SUBGHZ (1)
#else
#define AT86RF2XX_HAVE_SUBGHZ (0)
#endif
#if defined(DOXYGEN) || defined(MODULE_AT86RF232) || defined(MODULE_AT86RF233) || defined(MODULE_AT86RFR2)
/**
* @brief Frame retry counter reporting