boards/seeddstudio-gd32: improve OpenOCD configuration

boards/seeedstudio-gd32/Makefile.include

@@ -1,2 +1,10 @@
+# configure the serial interface
+PORT_LINUX ?= /dev/ttyUSB0
+PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))
+
+# configure the flasher
 PROGRAMMER ?= openocd
-OPENOCD_RESET_USE_CONNECT_ASSERT_SRST=1
+OPENOCD_DEBUG_ADAPTER ?= ftdi
+OPENOCD_FTDI_ADAPTER ?= openocd-usb
+OPENOCD_TRANSPORT = jtag
+OPENOCD_RESET_USE_CONNECT_ASSERT_SRST = 1

boards/seeedstudio-gd32/dist/openocd.cfg

@@ -1,12 +1,27 @@
-adapter driver ftdi
-adapter speed     10000
-ftdi_vid_pid 0x0403 0x6010
+adapter speed 10000
 adapter srst pulse_width 10
-reset_config srst_only srst_open_drain
-
-ftdi_layout_init 0x0020 0x001b
-ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
+reset_config srst_nogate srst_only srst_open_drain
 
 source [find target/gd32vf103.cfg]
 
-flash bank $_CHIPNAME.flash gd32vf103 0x08000000 0 0 0 $_TARGETNAME
+$_TARGETNAME configure -event reset-assert {
+
+    global _TARGETNAME
+
+    # Halt the core.
+    halt
+
+    # Unlock 0xe0042008 so that the next write triggers a reset
+    $_TARGETNAME mww 0xe004200c 0x4b5a6978
+
+    # We need to trigger the reset using abstract memory access, since
+    # progbuf access tries to read a status code out of a core register
+    # after the write happens, which fails when the core is in reset.
+    riscv set_mem_access abstract
+
+    # Go!
+    $_TARGETNAME mww 0xe0042008 0x1
+
+    # Put the memory access mode back to what it was.
+    riscv set_mem_access progbuf
+}