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Merge pull request #16221 from maribu/ptp-fix
cpu/stm32/periph_ptp: bugfix & better debug output
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commit
80e14e88a1
@ -71,9 +71,9 @@ void isr_eth(void)
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if (IS_USED(MODULE_PERIPH_PTP_TIMER)) {
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if (ETH->MACSR & ETH_MACSR_TSTS) {
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ptp_timer_cb();
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/* clear interrupt by reading PTPTSSR */
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(void)ETH->PTPTSSR;
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ptp_timer_cb();
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}
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}
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@ -29,7 +29,8 @@
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#include "periph_cpu.h"
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#include "timex.h"
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#define ENABLE_DEBUG 0
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#define ENABLE_DEBUG 0
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#define DEBUG_VERBOSE 0
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#include "debug.h"
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/* Workaround for typos in vendor files; drop when fixed upstream */
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@ -198,7 +199,7 @@ void ptp_timer_clear(void)
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void ptp_timer_set_absolute(const ptp_timestamp_t *target)
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{
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assert(target);
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DEBUG("[periph_ptp] Set timer: %" PRIu32 ".%" PRIu32 "\n",
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DEBUG("[periph_ptp] Set timer: %" PRIu32 ".%09" PRIu32 "\n",
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(uint32_t)target->seconds, target->nanoseconds);
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unsigned state = irq_disable();
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/* Mask PTP timer IRQ first, so that an interrupt is not triggered
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@ -212,7 +213,9 @@ void ptp_timer_set_absolute(const ptp_timestamp_t *target)
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/* Unmask the time stamp trigger interrupt */
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ETH->MACIMR &= ~ETH_MACIMR_TSTIM;
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irq_restore(state);
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DEBUG("PTPTSCR: 0x%08x, MACIMR: 0x%08x, MACSR: 0x%08x\n",
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(unsigned)ETH->PTPTSCR, (unsigned)ETH->MACIMR, (unsigned)ETH->MACSR);
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if (IS_ACTIVE(DEBUG_VERBOSE)) {
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DEBUG("PTPTSCR: 0x%08x, MACIMR: 0x%08x, MACSR: 0x%08x\n",
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(unsigned)ETH->PTPTSCR, (unsigned)ETH->MACIMR, (unsigned)ETH->MACSR);
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}
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}
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#endif /* IS_USED(MODULE_PTP_TIMER) */
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