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Completed CC2420 constants documentation (DOxygen)
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Kévin Roussel
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/**
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* cc2420_settings.h - Definitions and settings for the CC2420.
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* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
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* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de> and INRIA
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*
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* This source code is licensed under the GNU Lesser General Public License,
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* Version 2. See the file LICENSE for more details.
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@ -13,104 +13,300 @@
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* @file
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* @brief Definitions and settings for the CC2420
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* @author Milan Babel <babel@inf.fu-berlin.de>
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* @author Kévin Roussel <Kevin.Roussel@inria.fr>
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*
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*/
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#ifndef CC2420_SETTINGS_H
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#define CC2420_SETTINGS_H
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/* Access addresses */
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/**
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* @name CC2420 access mode values.
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* @brief Values defining the command you want to give to the CC2420:
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* read or write access to registers or RAM.
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* These values are to be OR-ed to the address you want to access.
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* @see CC2420 datasheet section 13.2 page 31.
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* @{
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*/
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/** @brief Read-Register Mode */
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#define CC2420_READ_ACCESS 0x40
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/** @brief Write Register Mode */
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#define CC2420_WRITE_ACCESS 0x00
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/**
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* @brief RAM Access Modifier (to use with @c CC2420_RAM_READ_ACCESS
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* or @c CC2420_RAM_WRITE_ACCESS)
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*/
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#define CC2420_RAM_ACCESS 0x80
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/** @brief Read-Memory Mode (to use with @c CC2420_RAM_ACCESS) */
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#define CC2420_RAM_READ_ACCESS 0x20
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/** @brief Write-Memory Mode (to use with @c CC2420_RAM_ACCESS) */
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#define CC2420_RAM_WRITE_ACCESS 0x00
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#define CC2420_REG_TXFIFO 0x3E
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#define CC2420_REG_RXFIFO 0x3F
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/**
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* @}
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*/
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/* RAM addresses */
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#define CC2420_RAM_SHORTADR 0x16A
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#define CC2420_RAM_PANID 0x168
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#define CC2420_RAM_IEEEADR 0x160
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/* Strobe command addresses */
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/**
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* @name Strobe command addresses
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* @brief Addresses of "strobe" commands in CC2420 address space.
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* @see CC2420 datasheet section 37 pages 61--62.
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* @{
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*/
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/** @brief NO Operation @see NOBYTE */
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#define CC2420_STROBE_NOP 0x00
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/** @brief Turn transceiver (internal oscillator) on */
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#define CC2420_STROBE_XOSCON 0x01
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/** @brief Calibrate TX frequency, then put transceiver in wait (inactive) mode */
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#define CC2420_STROBE_TXCAL 0x02
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/** @brief Put transceiver in RX mode */
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#define CC2420_STROBE_RXON 0x03
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/** @brief Put transceiver in TX mode */
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#define CC2420_STROBE_TXON 0x04
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/** @brief Put transceiver in TX mode after checking media availability */
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#define CC2420_STROBE_TXONCCA 0x05
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/** @brief Put transceiver in idle mode */
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#define CC2420_STROBE_RFOFF 0x06
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/** @brief Turn transceiver (internal oscillator) off -> power-down mode */
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#define CC2420_STROBE_XOSCOFF 0x07
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/** @brief Flush transceiver's RX buffer */
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#define CC2420_STROBE_FLUSHRX 0x08
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/** @brief Flush transceiver's TX buffer */
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#define CC2420_STROBE_FLUSHTX 0x09
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/** @brief Send an ACK frame with pending field cleared */
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#define CC2420_STROBE_ACK 0x0A
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/** @brief Send an ACK frame with pending field set */
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#define CC2420_STROBE_ACKPEND 0x0B
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/** @brief Start RXFIFO in-line decryption/verification */
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#define CC2420_STROBE_RXDEC 0x0C
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/** @brief Start TXFIFO in-line encryption/authentication */
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#define CC2420_STROBE_TXENC 0x0D
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/** @brief Start standalone AES encryption */
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#define CC2420_STROBE_AES 0x0E
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/* Register command addresses */
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/**
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* @}
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*/
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/**
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* @name CC2420 Configuration Register addresses.
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* @brief Addresses of configuration registers in CC2420 address space.
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* @see CC2420 datasheet section 37 pages 61 to 80.
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* @{
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*/
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/** @brief Main Control Register */
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#define CC2420_REG_MAIN 0x10
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/**
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* @brief Modem Control Register 0
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* @{
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*/
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#define CC2420_REG_MDMCTRL0 0x11
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/** @brief Address Decode enable flag */
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#define CC2420_ADR_DECODE 0x800
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/** @brief Reserved Frame accept enable flag */
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#define CC2420_RES_FRM_MODE 0x2000
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/** @brief PAN Coordinator mode enable flag */
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#define CC2420_PAN_COORD 0x1000
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/** @brief Automatic CRC computation/verification enable flag */
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#define CC2420_AUTOCRC 0x20
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/** @brief Automatic ACK response enable flag */
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#define CC2420_AUTOACK 0x10
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/** @} */
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/** @brief Modem Control Register 1 */
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#define CC2420_REG_MDMCTRL1 0x12
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/**
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* @brief RSSI and CCA Status and Control Register
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* @{
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*/
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#define CC2420_REG_RSSI 0x13
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/** @brief CCA Threshold value mask */
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#define CC2420_CCATHR_MASK 0xFF00
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/** @brief RSSI estimate value mask */
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#define CC2420_RSSI_MASK 0xFF
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/** @} */
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/** @brief Sync Word */
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#define CC2420_REG_SYNCWORD 0x14
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/**
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* @brief Transmit Control Register
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* @{
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*/
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#define CC2420_REG_TXCTRL 0x15
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/** @brief Output PA Level value mask */
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#define CC2420_PALEVEL_MASK 0x1F
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/** @} */
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/** @brief Receive Control Register 0 */
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#define CC2420_REG_RXCTRL0 0x16
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/**
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* @brief Receive Control Register 1
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* @{
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*/
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#define CC2420_REG_RXCTRL1 0x17
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/** @brief RX BandPass Filter Bias Current mode flag */
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#define CC2420_RXBPF_LOCUR 0x2000
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/** @} */
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/**
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* @brief Frequency Synthesizer Control and Status Register
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* @{
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*/
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#define CC2420_REG_FSCTRL 0x18
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/** @brief RF Operating Frequency mask */
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#define CC2420_FREQ_MASK 0x3FF
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/** @} */
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/**
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* @brief Security Control Register 0
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* @{
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*/
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#define CC2420_REG_SECCTRL0 0x19
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/** @brief RXFIFO Protection enable flag */
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#define CC2420_RXFIFO_PROTECTION 0x200
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/** @} */
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/** @brief Security Control Register 1 */
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#define CC2420_REG_SECCTRL1 0x1A
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/** @brief Battery Monitor Control Register */
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#define CC2420_REG_BATTMON 0x1B
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/**
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* @brief I/O Configuration Register 0
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* @{
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*/
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#define CC2420_REG_IOCFG0 0x1C
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/** @brief FIFOP Activation Threshold mask */
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#define CC2420_FIFOPTHR_MASK 0x7F
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/** @} */
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/** @brief I/O Configuration Register 1 */
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#define CC2420_REG_IOCFG1 0x1D
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/** @brief Manufacturer ID (low word) */
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#define CC2420_REG_MANFIDL 0x1E
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/** @brief Manufacturer ID (high word) */
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#define CC2420_REG_MANFIDH 0x1F
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/** @brief Finite State Machine Time Constants */
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#define CC2420_REG_FSMTC 0x20
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/** @brief Manual signal AND override Register */
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#define CC2420_REG_MANAND 0x21
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/** @brief Manual signal OR override Register */
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#define CC2420_REG_MANOR 0x22
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/** @brief AGC Control Register */
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#define CC2420_REG_AGCCTRL 0x23
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/** @brief AGC Test Register 0 */
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#define CC2420_REG_AGCTST0 0x24
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/** @brief AGC Test Register 1 */
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#define CC2420_REG_AGCTST1 0x25
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/** @brief AGC Test Register 2 */
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#define CC2420_REG_AGCTST2 0x26
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/** @brief Frequency Synthesizer Test Register 0 */
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#define CC2420_REG_FSTST0 0x27
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/** @brief Frequency Synthesizer Test Register 1 */
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#define CC2420_REG_FSTST1 0x28
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/** @brief Frequency Synthesizer Test Register 2 */
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#define CC2420_REG_FSTST2 0x29
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/** @brief Frequency Synthesizer Test Register 3 */
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#define CC2420_REG_FSTST3 0x2A
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/** @brief Receiver Bandpass Filters Test Register */
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#define CC2420_REG_RXBPFTST 0x2B
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/** @brief Finite State Machine Information Register */
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#define CC2420_REG_FSMSTATE 0x2C
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/** @brief ADC Test Register */
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#define CC2420_REG_ADCTST 0x2D
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/** @brief DAC Test Register */
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#define CC2420_REG_DACTST 0x2E
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/** @brief Top-level Test Register */
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#define CC2420_REG_TOPTST 0x2F
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/* Status byte flags */
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/** @brief Transmit FIFO Byte Register */
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#define CC2420_REG_TXFIFO 0x3E
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/** @brief Receive FIFO Byte Register */
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#define CC2420_REG_RXFIFO 0x3F
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/**
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* @}
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*/
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/**
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* @name CC2420 Configuration RAM addresses.
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* @brief Addresses of configuration zones in CC2420 RAM address space.
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* @see CC2420 datasheet section 13.5 page 31.
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* @{
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*/
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/** @brief Short (16-bit) address of the system into its current PAN. */
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#define CC2420_RAM_SHORTADR 0x16A
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/** @brief 16-bit ID of the PAN into which the system is associated. */
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#define CC2420_RAM_PANID 0x168
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/** @brief IEEE long (64-bit) address of the system. */
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#define CC2420_RAM_IEEEADR 0x160
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/**
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* @}
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*/
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/**
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* @name Status byte flags
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* @brief Bits of the status byte returned by CC2420 adter each command.
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* @see CC2420 datasheet section 13.3 page 29.
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* @{
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*/
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/**
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* @brief Bit XOSC16M_STABLE of the status register.
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* @details This bit indicates whether the 16-MHz oscillator
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* is running (value 1), or if the transceiver
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* is in power-down mode (value 0).
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*/
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#define CC2420_STATUS_XOSC16M_STABLE 0x40
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/**
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* @brief Bit TX_UNDERFLOW of the status register.
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* @details This bit indicates whether the latest transmission has failed
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* because the TX buffer didn't contain enough data (error bit).
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*/
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#define CC2420_STATUS_TX_UNDERFLOW 0x20
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/**
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* @brief Bit ENC_BUSY of the status register.
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* @details This bit indicates whether the encryption module
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* is currently busy (value 1), or not (value 0).
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*/
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#define CC2420_STATUS_ENC_BUSY 0x10
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/**
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* @brief Bit TX_ACTIVE of the status register.
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* @details This bit indicates whether a RF transmission
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* is currently in progress (value 1), or not (value 0).
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*/
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#define CC2420_STATUS_TX_ACTIVE 0x08
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/**
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* @brief Bit PLL_LOCK of the status register.
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* @details This bit indicates whether the frequency synthesizer PLL
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* is currently locked (value 1), or not (value 0).
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*/
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#define CC2420_STATUS_PLL_LOCK 0x04
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/**
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* @brief Bit RSSI_VALID of the status register.
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* @details This bit indicates whether the RSSI value
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* is valid (value 1), or not (value 0).
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* The RSSI is always valid when the CC2420
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* has been in RX mode for at least 128 µs),
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*/
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#define CC2420_STATUS_RSSI_VALID 0x02
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/* Misc */
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/**
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* @}
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*/
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/**
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* @brief Null command strobe/parameter.
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* @details Basically a strobe address used to perform a NOP on CC2420;
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* This is useful to just query the status byte, or more generally
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* passively receive bytes from the transceiver on its SPI link.
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*/
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#define NOBYTE 0x0
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/* Settings */
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/* Various configuration settings for the CC2420 drivers */
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#define CC2420_DEFAULT_CHANNR 18
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#define CC2420_SYNC_WORD_TX_TIME 900000
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#define CC2420_RX_BUF_SIZE 3
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#define CC2420_WAIT_TIME 500
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#endif
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