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board/stm32f3discovery: added SPI configuration
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@ -1,2 +1,2 @@
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FEATURES_PROVIDED += cpp
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FEATURES_PROVIDED += periph_uart periph_gpio periph_pwm
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FEATURES_PROVIDED += periph_uart periph_gpio periph_pwm periph_spi
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@ -147,6 +147,56 @@ extern "C" {
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#define PWM_1_PIN_AF 2
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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#define SPI_NUMOF (2U)
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#define SPI_0_EN 1
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#define SPI_1_EN 1
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#define SPI_IRQ_PRIO 1
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/* SPI 0 device config */
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#define SPI_0_DEV SPI1
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#define SPI_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_SPI1EN)
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#define SPI_0_CLKDIS() (RCC->APB2ENR &= ~RCC_APB2ENR_SPI1EN)
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#define SPI_0_IRQ SPI1_IRQn
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#define SPI_0_IRQ_HANDLER isr_spi1
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/* SPI 0 pin configuration */
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#define SPI_0_SCK_PORT GPIOA
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#define SPI_0_SCK_PIN 5
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#define SPI_0_SCK_AF 5
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#define SPI_0_SCK_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN)
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#define SPI_0_MISO_PORT GPIOA
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#define SPI_0_MISO_PIN 6
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#define SPI_0_MISO_AF 5
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#define SPI_0_MISO_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN)
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#define SPI_0_MOSI_PORT GPIOA
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#define SPI_0_MOSI_PIN 7
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#define SPI_0_MOSI_AF 5
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#define SPI_0_MOSI_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN)
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/* SPI 1 device config */
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#define SPI_1_DEV SPI3
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#define SPI_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_SPI3EN)
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#define SPI_1_CLKDIS() (RCC->APB1ENR &= ~RCC_APB1ENR_SPI3EN)
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#define SPI_1_IRQ SPI3_IRQn
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#define SPI_1_IRQ_HANDLER isr_spi3
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/* SPI 1 pin configuration */
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#define SPI_1_SCK_PORT GPIOC
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#define SPI_1_SCK_PIN 10
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#define SPI_1_SCK_AF 6
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#define SPI_1_SCK_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOCEN)
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#define SPI_1_MISO_PORT GPIOC
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#define SPI_1_MISO_PIN 11
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#define SPI_1_MISO_AF 6
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#define SPI_1_MISO_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOCEN)
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#define SPI_1_MOSI_PORT GPIOC
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#define SPI_1_MOSI_PIN 12
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#define SPI_1_MOSI_AF 6
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#define SPI_1_MOSI_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOCEN)
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/** @} */
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/**
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* @brief GPIO configuration
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* @{
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