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mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

Merge pull request #3194 from haukepetersen/mv_sam3x

cpu: rename SAM3X8E to SAM3
This commit is contained in:
Thomas Eichinger 2015-07-14 15:42:45 +02:00
commit 7e88358135
96 changed files with 323 additions and 81 deletions

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@ -1,5 +1,6 @@
# define the cpu used by the arduino due board
export CPU = sam3x8e
export CPU = sam3
export CPU_MODEL = sam3x8e
# define the default port depending on the host OS
PORT_LINUX ?= /dev/ttyACM0

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@ -1,5 +1,6 @@
# define the cpu used by the udoo board
export CPU = sam3x8e
export CPU = sam3
export CPU_MODEL = sam3x8e
#define the flash-tool and default port depending on the host operating system
OS := $(shell uname)

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@ -7,7 +7,7 @@
*/
/**
* @ingroup cpu_sam3x8e
* @ingroup cpu_sam3
* @{
*
* @file

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@ -1,5 +1,5 @@
/**
* @defgroup cpu_sam3x8e Atmel SAM3X8E
* @defgroup cpu_sam3 Atmel SAM3X8E
* @ingroup cpu
* @brief Atmel SAM3X8E Cortex-M3 MCU specific code
*/

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@ -7,7 +7,7 @@
*/
/**
* @ingroup cpu_sam3x8e
* @ingroup cpu_sam3
* @{
*
* @file

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@ -7,6 +7,7 @@
*/
/**
* @ingroup cpu_sam3
* @{
*
* @file

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@ -7,7 +7,7 @@
*/
/**
* @ingroup cpu_sam3x8e
* @ingroup cpu_sam3
* @{
*
* @file

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@ -274,34 +274,34 @@ void WDT_Handler ( void );
/** \addtogroup SAM3X8E_api Peripheral Software API */
/*@{*/
#include "component/component_adc.h"
#include "component/component_can.h"
#include "component/component_chipid.h"
#include "component/component_dacc.h"
#include "component/component_dmac.h"
#include "component/component_efc.h"
#include "component/component_emac.h"
#include "component/component_gpbr.h"
#include "component/component_hsmci.h"
#include "component/component_matrix.h"
#include "component/component_pdc.h"
#include "component/component_pio.h"
#include "component/component_pmc.h"
#include "component/component_pwm.h"
#include "component/component_rstc.h"
#include "component/component_rtc.h"
#include "component/component_rtt.h"
#include "component/component_smc.h"
#include "component/component_spi.h"
#include "component/component_ssc.h"
#include "component/component_supc.h"
#include "component/component_tc.h"
#include "component/component_trng.h"
#include "component/component_twi.h"
#include "component/component_uart.h"
#include "component/component_uotghs.h"
#include "component/component_usart.h"
#include "component/component_wdt.h"
#include "sam3x8e/component/component_adc.h"
#include "sam3x8e/component/component_can.h"
#include "sam3x8e/component/component_chipid.h"
#include "sam3x8e/component/component_dacc.h"
#include "sam3x8e/component/component_dmac.h"
#include "sam3x8e/component/component_efc.h"
#include "sam3x8e/component/component_emac.h"
#include "sam3x8e/component/component_gpbr.h"
#include "sam3x8e/component/component_hsmci.h"
#include "sam3x8e/component/component_matrix.h"
#include "sam3x8e/component/component_pdc.h"
#include "sam3x8e/component/component_pio.h"
#include "sam3x8e/component/component_pmc.h"
#include "sam3x8e/component/component_pwm.h"
#include "sam3x8e/component/component_rstc.h"
#include "sam3x8e/component/component_rtc.h"
#include "sam3x8e/component/component_rtt.h"
#include "sam3x8e/component/component_smc.h"
#include "sam3x8e/component/component_spi.h"
#include "sam3x8e/component/component_ssc.h"
#include "sam3x8e/component/component_supc.h"
#include "sam3x8e/component/component_tc.h"
#include "sam3x8e/component/component_trng.h"
#include "sam3x8e/component/component_twi.h"
#include "sam3x8e/component/component_uart.h"
#include "sam3x8e/component/component_uotghs.h"
#include "sam3x8e/component/component_usart.h"
#include "sam3x8e/component/component_wdt.h"
/*@}*/
/* ************************************************************************** */
@ -310,44 +310,44 @@ void WDT_Handler ( void );
/** \addtogroup SAM3X8E_reg Registers Access Definitions */
/*@{*/
#include "instance/instance_hsmci.h"
#include "instance/instance_ssc.h"
#include "instance/instance_spi0.h"
#include "instance/instance_tc0.h"
#include "instance/instance_tc1.h"
#include "instance/instance_tc2.h"
#include "instance/instance_twi0.h"
#include "instance/instance_twi1.h"
#include "instance/instance_pwm.h"
#include "instance/instance_usart0.h"
#include "instance/instance_usart1.h"
#include "instance/instance_usart2.h"
#include "instance/instance_usart3.h"
#include "instance/instance_uotghs.h"
#include "instance/instance_emac.h"
#include "instance/instance_can0.h"
#include "instance/instance_can1.h"
#include "instance/instance_trng.h"
#include "instance/instance_adc.h"
#include "instance/instance_dmac.h"
#include "instance/instance_dacc.h"
#include "instance/instance_smc.h"
#include "instance/instance_matrix.h"
#include "instance/instance_pmc.h"
#include "instance/instance_uart.h"
#include "instance/instance_chipid.h"
#include "instance/instance_efc0.h"
#include "instance/instance_efc1.h"
#include "instance/instance_pioa.h"
#include "instance/instance_piob.h"
#include "instance/instance_pioc.h"
#include "instance/instance_piod.h"
#include "instance/instance_rstc.h"
#include "instance/instance_supc.h"
#include "instance/instance_rtt.h"
#include "instance/instance_wdt.h"
#include "instance/instance_rtc.h"
#include "instance/instance_gpbr.h"
#include "sam3x8e/instance/instance_hsmci.h"
#include "sam3x8e/instance/instance_ssc.h"
#include "sam3x8e/instance/instance_spi0.h"
#include "sam3x8e/instance/instance_tc0.h"
#include "sam3x8e/instance/instance_tc1.h"
#include "sam3x8e/instance/instance_tc2.h"
#include "sam3x8e/instance/instance_twi0.h"
#include "sam3x8e/instance/instance_twi1.h"
#include "sam3x8e/instance/instance_pwm.h"
#include "sam3x8e/instance/instance_usart0.h"
#include "sam3x8e/instance/instance_usart1.h"
#include "sam3x8e/instance/instance_usart2.h"
#include "sam3x8e/instance/instance_usart3.h"
#include "sam3x8e/instance/instance_uotghs.h"
#include "sam3x8e/instance/instance_emac.h"
#include "sam3x8e/instance/instance_can0.h"
#include "sam3x8e/instance/instance_can1.h"
#include "sam3x8e/instance/instance_trng.h"
#include "sam3x8e/instance/instance_adc.h"
#include "sam3x8e/instance/instance_dmac.h"
#include "sam3x8e/instance/instance_dacc.h"
#include "sam3x8e/instance/instance_smc.h"
#include "sam3x8e/instance/instance_matrix.h"
#include "sam3x8e/instance/instance_pmc.h"
#include "sam3x8e/instance/instance_uart.h"
#include "sam3x8e/instance/instance_chipid.h"
#include "sam3x8e/instance/instance_efc0.h"
#include "sam3x8e/instance/instance_efc1.h"
#include "sam3x8e/instance/instance_pioa.h"
#include "sam3x8e/instance/instance_piob.h"
#include "sam3x8e/instance/instance_pioc.h"
#include "sam3x8e/instance/instance_piod.h"
#include "sam3x8e/instance/instance_rstc.h"
#include "sam3x8e/instance/instance_supc.h"
#include "sam3x8e/instance/instance_rtt.h"
#include "sam3x8e/instance/instance_wdt.h"
#include "sam3x8e/instance/instance_rtc.h"
#include "sam3x8e/instance/instance_gpbr.h"
/*@}*/
/* ************************************************************************** */
@ -514,7 +514,7 @@ void WDT_Handler ( void );
/** \addtogroup SAM3X8E_pio Peripheral Pio Definitions */
/*@{*/
#include "pio/pio_sam3x8e.h"
#include "sam3x8e/pio/pio_sam3x8e.h"
/*@}*/
/* ************************************************************************** */

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@ -7,7 +7,7 @@
*/
/**
* @ingroup cpu_sam3x8e
* @ingroup cpu_sam3
* @{
*
* @file

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@ -264,6 +264,8 @@ int gpio_init(gpio_t dev, gpio_dir_t dir, gpio_pp_t pushpull)
PMC->PMC_PCER0 = (1 << GPIO_31_IRQ);
break;
#endif
default:
return -2;
}
/* give the PIO module the power over the corresponding pin */
@ -793,6 +795,8 @@ int gpio_read(gpio_t dev)
pin = GPIO_31_PIN;
break;
#endif
default:
return -1;
}
if (port->PIO_OSR & pin) {
@ -1656,6 +1660,7 @@ void isr_pioa(void)
gpio_config[GPIO_A31_MAP].cb(gpio_config[GPIO_A31_MAP].arg);
}
#endif
(void)status; /* added to suppress cppcheck warnings */
if (sched_context_switch_request) {
thread_yield();
}
@ -1824,6 +1829,7 @@ void isr_piob(void)
gpio_config[GPIO_B31_MAP].cb(gpio_config[GPIO_B31_MAP].arg);
}
#endif
(void)status; /* added to suppress cppcheck warnings */
if (sched_context_switch_request) {
thread_yield();
}
@ -1992,6 +1998,7 @@ void isr_pioc(void)
gpio_config[GPIO_C31_MAP].cb(gpio_config[GPIO_C31_MAP].arg);
}
#endif
(void)status; /* added to suppress cppcheck warnings */
if (sched_context_switch_request) {
thread_yield();
}
@ -2160,6 +2167,7 @@ void isr_piod(void)
gpio_config[GPIO_D31_MAP].cb(gpio_config[GPIO_D31_MAP].arg);
}
#endif
(void)status; /* added to suppress cppcheck warnings */
if (sched_context_switch_request) {
thread_yield();
}

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@ -95,8 +95,6 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t t
int uart_init_blocking(uart_t uart, uint32_t baudrate)
{
uint16_t clock_divider = F_CPU / (16 * baudrate);
switch (uart) {
#if UART_0_EN
case UART_0:
@ -108,7 +106,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
UART_0_PORT->PIO_ABSR &= ~UART_0_PINS; /* periph function A */
/* set clock divider */
UART_0_DEV->UART_BRGR = clock_divider;
UART_0_DEV->UART_BRGR = (F_CPU / (16 * baudrate));
/* set to normal mode without parity */
UART_0_DEV->UART_MR = UART_MR_PAR_NO | UART_MR_CHMODE_NORMAL;
/* enable receiver and transmitter and reset status bits */
@ -125,7 +123,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
UART_1_PORT->PIO_ABSR &= ~UART_1_PINS; /* periph function A */
/* set clock divider */
UART_1_DEV->US_BRGR = clock_divider;
UART_1_DEV->US_BRGR = (F_CPU / (16 * baudrate));
/* set to normal mode without parity */
UART_1_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO;
/* enable receiver and transmitter and reset status bits */
@ -142,7 +140,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
UART_2_PORT->PIO_ABSR &= ~UART_2_PINS; /* periph function A */
/* set clock divider */
UART_2_DEV->US_BRGR = clock_divider;
UART_2_DEV->US_BRGR = (F_CPU / (16 * baudrate));
/* set to normal mode without parity */
UART_2_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO;
/* enable receiver and transmitter and reset status bits */
@ -159,7 +157,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
UART_3_PORT->PIO_ABSR |= UART_3_PINS; /* periph function B */
/* set clock divider */
UART_3_DEV->US_BRGR = clock_divider;
UART_3_DEV->US_BRGR = (F_CPU / (16 * baudrate));
/* set to normal mode without parity */
UART_3_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO;
/* enable receiver and transmitter and reset status bits */

232
cpu/sam3/startup.c Normal file
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@ -0,0 +1,232 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_sam3
* @{
*
* @file
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "panic.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
core_panic(PANIC_DUMMY_HANDLER, "DUMMY HANDLER");
}
void isr_nmi(void)
{
while (1) {asm ("nop");}
}
void isr_mem_manage(void)
{
while (1) {asm ("nop");}
}
void isr_debug_mon(void)
{
while (1) {asm ("nop");}
}
void isr_hard_fault(void)
{
core_panic(PANIC_HARD_FAULT, "HARD FAULT");
}
void isr_bus_fault(void)
{
core_panic(PANIC_BUS_FAULT, "BUS FAULT");
}
void isr_usage_fault(void)
{
core_panic(PANIC_USAGE_FAULT, "USAGE FAULT");
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* SAM3X8E specific interrupt vector */
void isr_supc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rstc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtt(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_wdt(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pmc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_efc0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_efc1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_smc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pioa(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_piob(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pioc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_piod(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_usart3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_hsmci(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_twi0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_twi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ssc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc5(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc6(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc7(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_tc8(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pwm(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dacc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_dmac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uotghs(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_trng(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_emac(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_can1(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) isr_mem_manage, /* memory controller interrupt */
(void*) isr_bus_fault, /* also not good to end up here */
(void*) isr_usage_fault, /* autsch */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) isr_svc, /* system call interrupt */
(void*) isr_debug_mon, /* debug interrupt */
(void*) (0UL), /* Reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* SAM3X8E specific peripheral handlers */
(void*) isr_supc, /* 0 supply controller */
(void*) isr_rstc, /* 1 reset controller */
(void*) isr_rtc, /* 2 real time clock */
(void*) isr_rtt, /* 3 real timer timer */
(void*) isr_wdt, /* 4 watchdog timer */
(void*) isr_pmc, /* 5 power management controller */
(void*) isr_efc0, /* 6 enhanced flash controller 0 */
(void*) isr_efc1, /* 7 enhanced flash controller 1 */
(void*) isr_uart, /* 8 universal asynchronous receiver transceiver */
(void*) isr_smc, /* 9 static memory controller */
(void*) (0UL),
(void*) isr_pioa, /* 11 GPIO port A */
(void*) isr_piob, /* 12 GPIO port B */
(void*) isr_pioc, /* 13 GPIO port C */
(void*) isr_piod, /* 14 GPIO port D */
(void*) (0UL),
(void*) (0UL),
(void*) isr_usart0, /* 17 USART0 */
(void*) isr_usart1, /* 18 USART1 */
(void*) isr_usart2, /* 19 USART2 */
(void*) isr_usart3, /* 20 USART3 */
(void*) isr_hsmci, /* 21 multimedia card interface */
(void*) isr_twi0, /* 22 two-wire interface 0 */
(void*) isr_twi1, /* 23 two-wire interface 1 */
(void*) isr_spi0, /* 24 serial peripheral interface */
(void*) (0UL),
(void*) isr_ssc, /* 26 synchronous serial controller */
(void*) isr_tc0, /* 27 timer counter 0 */
(void*) isr_tc1, /* 28 timer counter 1 */
(void*) isr_tc2, /* 29 timer counter 2 */
(void*) isr_tc3, /* 30 timer counter 3 */
(void*) isr_tc4, /* 31 timer counter 4 */
(void*) isr_tc5, /* 32 timer counter 5 */
(void*) isr_tc6, /* 33 timer counter 6 */
(void*) isr_tc7, /* 34 timer counter 7 */
(void*) isr_tc8, /* 35 timer counter 8 */
(void*) isr_pwm, /* 36 pulse width modulation controller */
(void*) isr_adc, /* 37 ADC controller */
(void*) isr_dacc, /* 38 DAC controller */
(void*) isr_dmac, /* 39 DMA controller */
(void*) isr_uotghs, /* 40 USB OTG high speed */
(void*) isr_trng, /* 41 true random number generator */
(void*) isr_emac, /* 42 Ethernet MAC*/
(void*) isr_can0, /* 43 CAN controller 0*/
(void*) isr_can1, /* 44 CAN controller 1*/
};

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@ -816,6 +816,8 @@ EXCLUDE_PATTERNS = */board/*/tools/* \
*/cpu/*/include/instance/* \
*/cpu/*/include/pio/* \
*/cpu/*/include/atmel/* \
*/cpu/sam3/include/sam3*.h \
*/cpu/sam3/include/system_sam*.h \
*/cpu/lpc*/include/core_cm*.h \
*/cpu/cortexm_common/include/core_cm*.h \
*/cpu/stm32f*/include/stm32f* \
@ -824,7 +826,6 @@ EXCLUDE_PATTERNS = */board/*/tools/* \
*/cpu/lpc1768/include/LPC17xx.h \
*/boards/*/include/periph_conf.h \
*/cpu/x86/include/x86_pci.h \
*/cpu/sam3x8e/include/sam3x8e.h \
*/cpu/stm32l1/include/stm32l1xx.h \
*/cpu/k60/include/MK60D10.h \
*/cpu/k60/include/MK60DZ10.h \