Merge #18863

18863: boards/esp32s2-mini: add definition for ESP32 S2 Mini r=gschorcht a=benpicco



Co-authored-by: Benjamin Valentin <benjamin.valentin@bht-berlin.de>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>

boards/common/makefiles/stdio_tinyusb_cdc_acm.dep.mk

@@ -0,0 +1,11 @@
+ifeq (,$(filter stdio_% slipdev_stdio,$(USEMODULE)))
+  # Use stdio_tinyusb_cdc_acm only if no other stdio is requested explicitly.
+  # and usbus is used for any other reason
+  ifneq (,$(filter usbus,$(USEMODULE)))
+    USEMODULE += stdio_cdc_acm
+  else
+    USEMODULE += stdio_tinyusb_cdc_acm
+  endif
+
+  FEATURES_REQUIRED += highlevel_stdio
+endif

boards/esp32s2-wemos-mini/Kconfig

@@ -0,0 +1,24 @@
+# Copyright (c) 2022 Benjamin Valentin
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+
+config BOARD
+    default "esp32s2-wemos-mini" if BOARD_ESP32S2_WEMOS_MINI
+
+config BOARD_ESP32S2_WEMOS_MINI
+    bool
+    default y
+    select BOARD_COMMON_ESP32S2
+    select CPU_MODEL_ESP32S2_FN4R2
+    select HAS_PERIPH_ADC
+    select HAS_PERIPH_DAC
+    select HAS_PERIPH_I2C
+    select HAS_PERIPH_PWM
+    select HAS_PERIPH_SPI
+    select HAS_PERIPH_USBDEV
+    select HAS_TINYUSB_DEVICE
+    select HAS_HIGHLEVEL_STDIO
+
+source "$(RIOTBOARD)/common/esp32s2/Kconfig"

boards/esp32s2-wemos-mini/Makefile

@@ -0,0 +1,5 @@
+MODULE = board
+
+DIRS = $(RIOTBOARD)/common/esp32s2
+
+include $(RIOTBASE)/Makefile.base

boards/esp32s2-wemos-mini/Makefile.dep

@@ -0,0 +1,2 @@
+include $(RIOTBOARD)/common/makefiles/stdio_tinyusb_cdc_acm.dep.mk
+include $(RIOTBOARD)/common/esp32s2/Makefile.dep

boards/esp32s2-wemos-mini/Makefile.features

@@ -0,0 +1,15 @@
+CPU_MODEL = esp32s2_fn4r2
+
+# common board and CPU features
+include $(RIOTBOARD)/common/esp32s2/Makefile.features
+
+# additional features provided by the board
+FEATURES_PROVIDED += periph_adc
+FEATURES_PROVIDED += periph_dac
+FEATURES_PROVIDED += periph_i2c
+FEATURES_PROVIDED += periph_pwm
+FEATURES_PROVIDED += periph_spi
+FEATURES_PROVIDED += periph_usbdev
+
+FEATURES_PROVIDED += highlevel_stdio
+FEATURES_PROVIDED += tinyusb_device

boards/esp32s2-wemos-mini/Makefile.include

@@ -0,0 +1,9 @@
+PORT_LINUX ?= /dev/ttyACM0
+
+USB_VID ?= $(USB_VID_TESTING)
+USB_PID ?= $(USB_PID_TESTING)
+
+CFLAGS += -DCONFIG_CONSOLE_UART_TX=39
+CFLAGS += -DCONFIG_CONSOLE_UART_RX=37
+
+include $(RIOTBOARD)/common/esp32s2/Makefile.include

boards/esp32s2-wemos-mini/doc.txt

@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2022 Benjamin Valentin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @defgroup    boards_esp32s2-wemos-mini Wemos S2 mini Board
+ * @ingroup     boards_esp32s2
+ * @brief       Support for Wemos S2 mini Board
+ * @author      Benjamin Valentin <benjamin.valentin@ml-pa.com>
+
+\section esp32s2-wemos-mini Wemos S2 mini
+
+## Overview {#esp32s2-wemos-mini_overview}
+
+\image html "https://www.wemos.cc/en/latest/_images/s2_mini_v1.0.0_4_16x9.jpg" "Wemos S2 mini" width=600px
+
+Documentation for the board can be found on the vendor page:
+
+- [Wemos S2 mini](https://www.wemos.cc/en/latest/s2/s2_mini.html)
+- [Schematic](https://www.wemos.cc/en/latest/_static/files/sch_s2_mini_v1.0.0.pdf)
+
+## Flashing the Device {#esp32s2-wemos-mini_flashing}
+
+Flashing RIOT is quite easy. The board has a Micro-USB connector with
+reset/boot/flash logic. Just connect the board to your host computer
+and type using the programming port:
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+BOARD=esp32s2-wemos-mini make flash
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+If RIOT is already on the device, it should automatically enter bootloader mode.
+If this does not work or the device is stuck in some other mode, you can force
+it into bootloader mode by pressing the Reset (RST) button while holding the BOOT (0)
+button.
+
+For detailed information about ESP32-S2 as well as configuring and compiling
+RIOT for ESP32-S2 boards, see \ref esp32_riot.
+
+[Back to table of contents](#esp32s2-wemos-mini_toc)
+ */

boards/esp32s2-wemos-mini/esp32s2-wemos-mini.config

@@ -0,0 +1,2 @@
+CONFIG_PACKAGE_TINYUSB=y
+CONFIG_MODULE_STDIO_TINYUSB_CDC_ACM=y

boards/esp32s2-wemos-mini/include/board.h

@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2022 Benjamin Valentin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_esp32s2-wemos-mini
+ * @brief       Board definitions for Wemos S2 mini board
+ * @{
+ *
+ * The board definitions in this file is valid for the Wemos S2 mini board.
+ *
+ * @file
+ * @author      Benjamin Valentin <benjamin.valentin@ml-pa.com>
+ */
+
+#ifndef BOARD_H
+#define BOARD_H
+
+#include <stdint.h>
+
+/**
+ * @name    Button pin definitions
+ * @{
+ */
+
+/**
+ * @brief   Default button GPIO pin definition
+ *
+ * Wemos S2 mini boards have a BOOT button connected to GPIO0, which can be
+ * used as button during normal operation. Since the GPIO0 pin is pulled up,
+ * the button signal is inverted, i.e., pressing the button will give a
+ * low signal.
+ */
+#define BTN0_PIN        GPIO0
+
+/**
+ * @brief   Default button GPIO mode definition
+ */
+#define BTN0_MODE       GPIO_IN_PU
+
+/**
+ * @brief   Default interrupt flank definition for the button GPIO
+ */
+#ifndef BTN0_INT_FLANK
+#define BTN0_INT_FLANK  GPIO_FALLING
+#endif
+
+/**
+ * @brief   Definition for compatibility with previous versions
+ */
+#define BUTTON0_PIN     BTN0_PIN
+
+/** @} */
+
+/**
+ * @name    LED (on-board) configuration
+ *
+ * @{
+ */
+#define LED0_PIN        GPIO15  /**< LED is connected to GPIO15 */
+#define LED0_ACTIVE     1       /**< LED is high active */
+/** @} */
+
+/* include common board definitions as last step */
+#include "board_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+} /* end extern "C" */
+#endif
+
+#endif /* BOARD_H */
+/** @} */

boards/esp32s2-wemos-mini/include/gpio_params.h

@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2022 Benjamin Valentin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+#ifndef GPIO_PARAMS_H
+#define GPIO_PARAMS_H
+
+/**
+ * @ingroup     boards_esp32s2-wemos-mini
+ * @brief       Board specific configuration of direct mapped GPIOs
+ * @file
+ * @author      Benjamin Valentin <benjamin.valentin@ml-pa.com>
+ * @{
+ */
+
+#include "board.h"
+#include "saul/periph.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   LED and Button configuration
+ */
+static const  saul_gpio_params_t saul_gpio_params[] =
+{
+    {
+        .name = "LED",
+        .pin = LED0_PIN,
+        .mode = GPIO_OUT,
+    },
+    {
+        .name = "BOOT",
+        .pin = BTN0_PIN,
+        .mode = BTN0_MODE,
+        .flags = SAUL_GPIO_INVERTED
+    },
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* GPIO_PARAMS_H */
+/** @} */

boards/esp32s2-wemos-mini/include/periph_conf.h

@@ -0,0 +1,148 @@
+/*
+ * Copyright (C) 2022 Benjamin Valentin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_esp32s2-wemos-mini
+ * @brief       Peripheral configurations for Wemos S2 mini boards
+ * @{
+ *
+ * The peripheral configurations in this file can be used for Espressif
+ * Wemos S2 mini boards.
+ *
+ * @file
+ * @author      Benjamin Valentin <benjamin.valentin@ml-pa.com>
+ */
+
+#ifndef PERIPH_CONF_H
+#define PERIPH_CONF_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @name    ADC and DAC channel configuration
+ * @{
+ */
+/**
+ * @brief   Declaration of GPIOs that can be used as ADC channels
+ *
+ * @note As long as the GPIOs listed in ADC_GPIOS are not initialized as ADC
+ * channels with the `adc_init` function, they can be used for other
+ * purposes.
+ */
+#ifndef ADC_GPIOS
+#define ADC_GPIOS   { GPIO3,  GPIO1,  GPIO2,  GPIO4, GPIO5, GPIO6, GPIO8, GPIO10 }
+#endif
+
+/**
+ * @brief   Declaration of GPIOs that can be used as DAC channels
+ *
+ * @note As long as the GPIOs listed in DAC_GPIOS are not initialized as DAC
+ * channels with the `dac_init` function, they can be used for other
+ * purposes.
+ */
+#ifndef DAC_GPIOS
+#define DAC_GPIOS   { GPIO17, GPIO18 }
+#endif
+/** @} */
+
+/**
+ * @name   I2C configuration
+ *
+ * Only I2C interface I2C_DEV(0) is used.
+ *
+ * @note The GPIOs listed in the configuration are only initialized as I2C
+ * signals when module `periph_i2c` is used. Otherwise they are not
+ * allocated and can be used for other purposes.
+ *
+ * @{
+ */
+#ifndef I2C0_SPEED
+#define I2C0_SPEED  I2C_SPEED_FAST  /**< I2C bus speed of I2C_DEV(0) */
+#endif
+#ifndef I2C0_SCL
+#define I2C0_SCL    GPIO35          /**< SCL signal of I2C_DEV(0) */
+#endif
+#ifndef I2C0_SDA
+#define I2C0_SDA    GPIO33          /**< SDA signal of I2C_DEV(0) */
+#endif
+/** @} */
+
+/**
+ * @name   PWM channel configuration
+ *
+ * @note As long as the according PWM device is not initialized with
+ * the `pwm_init`, the GPIOs declared for this device can be used
+ * for other purposes.
+ *
+ * @{
+ */
+
+/**
+ * @brief Declaration of the channels for device PWM_DEV(0),
+ *        at maximum PWM_CHANNEL_NUM_DEV_MAX.
+ */
+#ifndef PWM0_GPIOS
+#define PWM0_GPIOS  { GPIO13, GPIO14, GPIO15 }
+#endif
+/** @} */
+
+/**
+ * @name    SPI configuration
+ *
+ * @note The GPIOs listed in the configuration are first initialized as SPI
+ * signals when the corresponding SPI interface is used for the first time
+ * by either calling the `spi_init_cs` function or the `spi_acquire`
+ * function. That is, they are not allocated as SPI signals before and can
+ * be used for other purposes as long as the SPI interface is not used.
+ * @{
+ */
+#ifndef SPI0_CTRL
+#define SPI0_CTRL   FSPI    /**< FSPI is used as SPI_DEV(0) */
+#endif
+#ifndef SPI0_SCK
+#define SPI0_SCK    GPIO7   /**< FSPI SCK (pin FSPICLK) */
+#endif
+#ifndef SPI0_MISO
+#define SPI0_MISO   GPIO9   /**< FSPI MISO (pin FSPIQ) */
+#endif
+#ifndef SPI0_MOSI
+#define SPI0_MOSI   GPIO11  /**< FSPI MOSI (pin FSPID) */
+#endif
+#ifndef SPI0_CS0
+#define SPI0_CS0    GPIO12  /**< FSPI CS0 (pin FSPICS0) */
+#endif
+/** @} */
+
+/**
+ * @name   UART configuration
+ *
+ * ESP32-S2 provides 2 UART interfaces at maximum:
+ *
+ * UART_DEV(0) uses Wemos standard pinout.<br>
+ * UART_DEV(1) is not used.<br>
+ *
+ * @{
+ */
+#define UART0_TXD   GPIO39  /**< direct I/O pin for UART_DEV(0) TxD */
+#define UART0_RXD   GPIO37  /**< direct I/O pin for UART_DEV(0) RxD */
+
+/** @} */
+
+#ifdef __cplusplus
+} /* end extern "C" */
+#endif
+
+/* include common peripheral definitions as last step */
+#include "periph_conf_common.h"
+
+#endif /* PERIPH_CONF_H */
+/** @} */

cpu/esp32/Kconfig.esp32s2

@@ -30,6 +30,7 @@ config CPU_FAM_ESP32S2
     select MODULE_PTHREAD if MODULE_CPP
     select MODULE_RTT_RTC if HAS_PERIPH_RTT && MODULE_PERIPH_RTC
     select MODULE_USBDEV_SYNOPSYS_DWC2 if MODULE_PERIPH_USBDEV
+    select MODULE_USB_BOARD_RESET if MODULE_USBUS_CDC_ACM || MODULE_TINYUSB_CLASS_CDC
     imply MODULE_NEWLIB_NANO
 
 config CPU_FAM

cpu/esp32/Kconfig.esp32s3

@@ -37,6 +37,7 @@ config CPU_FAM_ESP32S3
     select MODULE_PTHREAD if MODULE_CPP
     select MODULE_RTT_RTC if HAS_PERIPH_RTT && MODULE_PERIPH_RTC
     select MODULE_USBDEV_SYNOPSYS_DWC2 if MODULE_PERIPH_USBDEV
+    select MODULE_USB_BOARD_RESET if MODULE_USBUS_CDC_ACM || MODULE_TINYUSB_CLASS_CDC
     imply MODULE_NEWLIB_NANO
 
 config CPU_FAM

cpu/esp32/Makefile

@@ -13,6 +13,10 @@ ifneq (, $(filter esp_bootloader, $(USEMODULE)))
     DIRS += bootloader
 endif
 
+ifneq (, $(filter usb_board_reset, $(USEMODULE)))
+    SRC += usb_reset.c
+endif
+
 ifneq (, $(filter esp_ble_nimble, $(USEMODULE)))
     DIRS += esp-ble-nimble
 endif

cpu/esp32/Makefile.dep

@@ -184,3 +184,10 @@ endif
 ifneq (,$(filter esp_jtag,$(USEMODULE)))
   FEATURES_REQUIRED += esp_jtag
 endif
+
+# enable bootloader reset over USB, requires CDC ACM to be used
+ifneq (,$(filter usbus_cdc_acm tinyusb_class_cdc,$(USEMODULE)))
+  USEMODULE += usb_board_reset
+
+  include $(RIOTMAKE)/tools/usb_board_reset.mk
+endif

cpu/esp32/include/sdkconfig_esp32s2.h

@@ -106,7 +106,6 @@ extern "C" {
  * ESP32-S2 specific USB configuration
  */
 #ifdef MODULE_ESP_IDF_USB
-#define CONFIG_ESP_PHY_ENABLE_USB               1
 #define CONFIG_USB_OTG_SUPPORTED                1
 #endif
 /**

cpu/esp32/usb_reset.c

@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2023 Benjamin Valentin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @ingroup     cpu_esp32
+ * @{
+ *
+ * @file
+ * @brief       Trigger reset to the bootloader stored in the internal boot ROM
+ *              memory.
+ *
+ *              This will start the USB/UART bootloader.
+ *
+ * @author      Benjamin Valentin <benpicco@googlemail.com>
+ * @author      Gunar Schorcht <gunar@schorcht.net>
+ *
+ * @}
+ */
+
+#include "driver/periph_ctrl.h"
+#include "rom/usb/chip_usb_dw_wrapper.h"
+#include "rom/usb/usb_persist.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/rtc_cntl_struct.h"
+#include "soc/soc_caps.h"
+#if SOC_USB_SERIAL_JTAG_SUPPORTED
+#include "soc/usb_serial_jtag_reg.h"
+#include "soc/usb_serial_jtag_struct.h"
+#endif
+
+#include "periph/pm.h"
+
+static void _reconfigure_usb(void)
+{
+#ifdef CPU_FAM_ESP32S3
+    /* disable USB OTG controller */
+    periph_module_reset(PERIPH_USB_MODULE);
+    periph_module_disable(PERIPH_USB_MODULE);
+
+    /* allow USB Serial/JTAG to use the internal USB transceiver */
+    RTCCNTL.usb_conf.sw_usb_phy_sel = 0;
+    /* control the internal USB transceiver selection via hardware (efuse) */
+    RTCCNTL.usb_conf.sw_hw_usb_phy_sel = 0;
+    /* don't enable USB transceiver function */
+    RTCCNTL.usb_conf.usb_pad_enable = 0;
+
+    /* select internal PHY for USB Serial/JTAG */
+    USB_SERIAL_JTAG.conf0.phy_sel = 0;
+    /* enable USB pad function */
+    USB_SERIAL_JTAG.conf0.usb_pad_enable = 1;
+#endif
+}
+
+void __attribute__((weak)) usb_board_reset_in_bootloader(void)
+{
+    /* If we are here, the USB port is not connected to the Serial/JTAG interface.
+       We have to re-configure it back to this mode first. */
+    _reconfigure_usb();
+
+    chip_usb_set_persist_flags(USBDC_PERSIST_ENA);
+    REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
+    pm_reboot();
+}

tests/xtimer_now32_overflow/Makefile

@@ -7,6 +7,7 @@ DISABLE_MODULE += auto_init_xtimer
 
 # Boards that can't run only on xtimer or that always select ztimer
 BOARD_BLACKLIST += \
+                   esp32s2-wemos-mini \
                    feather-nrf52840 \
                    hamilton \
                    mulle \

tests/xtimer_now64_continuity/Makefile

@@ -8,6 +8,7 @@ USEMODULE += xtimer_no_ztimer_default
 TEST_ON_CI_BLACKLIST += native
 # Boards that can't run only on xtimer or that always select ztimer
 BOARD_BLACKLIST += \
+                   esp32s2-wemos-mini \
                    feather-nrf52840 \
                    hamilton \
                    mulle \