mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
cpu/sam0/periph: remove bitfield usage in RTC/RTT driver
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
This commit is contained in:
Dylan Laduranty
parent
a66eebb8ac
commit
7c1e66bdae
@ -113,13 +113,13 @@ static void _wait_syncbusy(void)
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#ifdef REG_RTC_MODE0_SYNCBUSY
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while (RTC->MODE0.SYNCBUSY.reg) {}
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#else
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while (RTC->MODE0.STATUS.bit.SYNCBUSY) {}
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while (RTC->MODE0.STATUS.reg & RTC_STATUS_SYNCBUSY) {}
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#endif
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} else {
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#ifdef REG_RTC_MODE2_SYNCBUSY
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while (RTC->MODE2.SYNCBUSY.reg) {}
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#else
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while (RTC->MODE2.STATUS.bit.SYNCBUSY) {}
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while (RTC->MODE2.STATUS.reg & RTC_STATUS_SYNCBUSY) {}
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#endif
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}
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}
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@ -164,12 +164,23 @@ static void _poweroff(void)
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}
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MAYBE_UNUSED
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static inline void _rtc_set_enabled(bool on)
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static inline void _rtc_enable(void)
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{
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#ifdef REG_RTC_MODE2_CTRLA
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RTC->MODE2.CTRLA.bit.ENABLE = on;
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RTC->MODE2.CTRLA.reg |= RTC_MODE2_CTRLA_ENABLE;
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#else
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RTC->MODE2.CTRL.bit.ENABLE = on;
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RTC->MODE2.CTRL.reg |= RTC_MODE2_CTRL_ENABLE;
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#endif
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_wait_syncbusy();
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}
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MAYBE_UNUSED
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static inline void _rtc_disable(void)
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{
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#ifdef REG_RTC_MODE2_CTRLA
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RTC->MODE2.CTRLA.reg &= ~RTC_MODE2_CTRLA_ENABLE;
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#else
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RTC->MODE2.CTRL.reg &= ~RTC_MODE2_CTRL_ENABLE;
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#endif
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_wait_syncbusy();
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}
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@ -178,10 +189,10 @@ static inline void _rtt_reset(void)
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{
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#ifdef RTC_MODE0_CTRL_SWRST
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RTC->MODE0.CTRL.reg = RTC_MODE0_CTRL_SWRST;
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while (RTC->MODE0.CTRL.bit.SWRST) {}
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while (RTC->MODE0.CTRL.reg & RTC_MODE0_CTRL_SWRST) {}
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#else
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RTC->MODE0.CTRLA.reg = RTC_MODE2_CTRLA_SWRST;
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while (RTC->MODE0.CTRLA.bit.SWRST) {}
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while (RTC->MODE0.CTRLA.reg & RTC_MODE0_CTRLA_SWRST) {}
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#endif
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}
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@ -193,7 +204,7 @@ static void _rtc_clock_setup(void)
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN
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| GCLK_CLKCTRL_GEN(SAM0_GCLK_1KHZ)
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| GCLK_CLKCTRL_ID_RTC;
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while (GCLK->STATUS.bit.SYNCBUSY) {}
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while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY) {}
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}
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#endif /* MODULE_PERIPH_RTC */
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@ -204,7 +215,7 @@ static void _rtt_clock_setup(void)
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN
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| GCLK_CLKCTRL_GEN(SAM0_GCLK_32KHZ)
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| GCLK_CLKCTRL_ID_RTC;
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while (GCLK->STATUS.bit.SYNCBUSY) {}
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while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY) {}
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}
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#endif /* MODULE_PERIPH_RTT */
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@ -215,12 +226,12 @@ static void _rtc_clock_setup(void)
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{
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/* RTC source clock is external oscillator at 1kHz */
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#if EXTERNAL_OSC32_SOURCE
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OSC32KCTRL->XOSC32K.bit.EN1K = 1;
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OSC32KCTRL->XOSC32K.reg |= OSC32KCTRL_XOSC32K_EN1K;
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OSC32KCTRL->RTCCTRL.reg = OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K;
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/* RTC uses internal 32,768KHz Oscillator */
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#elif INTERNAL_OSC32_SOURCE
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OSC32KCTRL->OSC32K.bit.EN1K = 1;
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OSC32KCTRL->OSC32K.reg |= OSC32KCTRL_OSC32K_EN1K;
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OSC32KCTRL->RTCCTRL.reg = OSC32KCTRL_RTCCTRL_RTCSEL_OSC1K;
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/* RTC uses Ultra Low Power internal 32,768KHz Oscillator */
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@ -238,7 +249,7 @@ static void _rtt_clock_setup(void)
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{
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/* RTC source clock is external oscillator at 32kHz */
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#if EXTERNAL_OSC32_SOURCE
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OSC32KCTRL->XOSC32K.bit.EN32K = 1;
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OSC32KCTRL->XOSC32K.reg |= OSC32KCTRL_XOSC32K_EN32K;
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OSC32KCTRL->RTCCTRL.reg = OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K;
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/* RTC uses internal 32,768KHz Oscillator */
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@ -319,8 +330,10 @@ void rtc_mem_write(unsigned offset, void *data, size_t len)
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static void _rtc_init(void)
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{
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#ifdef REG_RTC_MODE2_CTRLA
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uint32_t mode = ((RTC->MODE2.CTRLA.reg & RTC_MODE2_CTRLA_MODE_Msk)
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>> RTC_MODE2_CTRLA_MODE_Pos);
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/* skip reset if already in RTC mode */
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if (RTC->MODE2.CTRLA.bit.MODE == RTC_MODE2_CTRLA_MODE_CLOCK_Val) {
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if (mode == RTC_MODE2_CTRLA_MODE_CLOCK_Val) {
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return;
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}
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@ -343,7 +356,9 @@ static void _rtc_init(void)
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RTC->MODE2.CTRLB.reg = RTC_MODE2_CTRLB_GP2EN;
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#endif
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#else
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if (RTC->MODE2.CTRL.bit.MODE == RTC_MODE2_CTRL_MODE_CLOCK_Val) {
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uint32_t mode = ((RTC->MODE2.CTRL.reg & RTC_MODE2_CTRL_MODE_Msk)
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>> RTC_MODE2_CTRL_MODE_Pos);
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if (mode == RTC_MODE2_CTRL_MODE_CLOCK_Val) {
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return;
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}
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@ -371,7 +386,7 @@ void rtc_init(void)
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/* Clear interrupt flags */
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RTC->MODE2.INTFLAG.reg = RTC_MODE2_INTFLAG_ALARM0;
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_rtc_set_enabled(1);
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_rtc_enable();
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NVIC_EnableIRQ(RTC_IRQn);
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}
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@ -443,9 +458,9 @@ static int _rtc_pin(gpio_t pin)
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static void _set_tampctrl(uint32_t reg)
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{
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_rtc_set_enabled(0);
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_rtc_disable();
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RTC->MODE0.TAMPCTRL.reg = reg;
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_rtc_set_enabled(1);
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_rtc_enable();
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}
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void rtc_tamper_init(void)
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@ -512,10 +527,10 @@ void rtc_tamper_enable(void)
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NVIC_DisableIRQ(RTC_IRQn);
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/* enable tamper detect as wake-up source */
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RTC->MODE0.INTENSET.bit.TAMPER = 1;
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RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_TAMPER;
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/* wait for first tamper event */
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while (!RTC->MODE0.INTFLAG.bit.TAMPER && --timeout) {}
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while (!(RTC->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_TAMPER) && --timeout) {}
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/* clear tamper flag flag */
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RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_TAMPER;
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@ -524,7 +539,7 @@ void rtc_tamper_enable(void)
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NVIC_EnableIRQ(RTC_IRQn);
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} else {
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/* no spurious event on falling edge */
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RTC->MODE0.INTENSET.bit.TAMPER = 1;
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RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_TAMPER;
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}
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DEBUG("tamper enabled\n");
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@ -560,17 +575,18 @@ int rtc_get_alarm(struct tm *time)
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/* Read alarm register in one time */
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alarm.reg = RTC->MODE2.Mode2Alarm[0].ALARM.reg;
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time->tm_year = alarm.bit.YEAR + reference_year;
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time->tm_year = ((alarm.reg & RTC_MODE2_ALARM_YEAR_Msk) >> RTC_MODE2_ALARM_YEAR_Pos)
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+ reference_year;
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if ((time->tm_year < reference_year) ||
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(time->tm_year > (reference_year + 63))) {
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return -1;
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}
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time->tm_mon = alarm.bit.MONTH - 1;
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time->tm_mday = alarm.bit.DAY;
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time->tm_hour = alarm.bit.HOUR;
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time->tm_min = alarm.bit.MINUTE;
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time->tm_sec = alarm.bit.SECOND;
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time->tm_mon = ((alarm.reg & RTC_MODE2_ALARM_MONTH_Msk) >> RTC_MODE2_ALARM_MONTH_Pos) - 1;
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time->tm_mday = ((alarm.reg & RTC_MODE2_ALARM_DAY_Msk) >> RTC_MODE2_ALARM_DAY_Pos);
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time->tm_hour = ((alarm.reg & RTC_MODE2_ALARM_HOUR_Msk) >> RTC_MODE2_ALARM_HOUR_Pos);
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time->tm_min = ((alarm.reg & RTC_MODE2_ALARM_MINUTE_Msk) >> RTC_MODE2_ALARM_MINUTE_Pos);
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time->tm_sec = ((alarm.reg & RTC_MODE2_ALARM_SECOND_Msk) >> RTC_MODE2_ALARM_SECOND_Pos);
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return 0;
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}
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@ -583,18 +599,18 @@ int rtc_get_time(struct tm *time)
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_read_req();
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clock.reg = RTC->MODE2.CLOCK.reg;
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time->tm_year = clock.bit.YEAR + reference_year;
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time->tm_year = ((clock.reg & RTC_MODE2_CLOCK_YEAR_Msk) >> RTC_MODE2_CLOCK_YEAR_Pos)
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+ reference_year;
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if ((time->tm_year < reference_year) ||
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(time->tm_year > (reference_year + 63))) {
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return -1;
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}
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time->tm_mon = clock.bit.MONTH - 1;
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time->tm_mday = clock.bit.DAY;
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time->tm_hour = clock.bit.HOUR;
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time->tm_min = clock.bit.MINUTE;
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time->tm_sec = clock.bit.SECOND;
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time->tm_mon = ((clock.reg & RTC_MODE2_CLOCK_MONTH_Msk) >> RTC_MODE2_CLOCK_MONTH_Pos) - 1;
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time->tm_mday = ((clock.reg & RTC_MODE2_CLOCK_DAY_Msk) >> RTC_MODE2_CLOCK_DAY_Pos);
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time->tm_hour = ((clock.reg & RTC_MODE2_CLOCK_HOUR_Msk) >> RTC_MODE2_CLOCK_HOUR_Pos);
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time->tm_min = ((clock.reg & RTC_MODE2_CLOCK_MINUTE_Msk) >> RTC_MODE2_CLOCK_MINUTE_Pos);
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time->tm_sec = ((clock.reg & RTC_MODE2_CLOCK_SECOND_Msk) >> RTC_MODE2_CLOCK_SECOND_Pos);
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return 0;
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}
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@ -781,7 +797,7 @@ static void _isr_rtc(void)
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return;
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}
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if (RTC->MODE2.INTFLAG.bit.ALARM0) {
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if (RTC->MODE2.INTFLAG.reg & RTC_MODE2_INTFLAG_ALARM0) {
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/* clear flag */
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RTC->MODE2.INTFLAG.reg = RTC_MODE2_INTFLAG_ALARM0;
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@ -797,13 +813,13 @@ static void _isr_rtt(void)
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return;
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}
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if (RTC->MODE0.INTFLAG.bit.OVF) {
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if (RTC->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_OVF) {
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RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_OVF;
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if (overflow_cb.cb) {
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overflow_cb.cb(overflow_cb.arg);
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}
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}
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if (RTC->MODE0.INTFLAG.bit.CMP0) {
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if (RTC->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_CMP0) {
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/* clear flag */
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RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0;
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/* disable interrupt */
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@ -818,7 +834,7 @@ static void _isr_rtt(void)
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static void _isr_tamper(void)
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{
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#ifdef RTC_MODE0_INTFLAG_TAMPER
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if (RTC->MODE0.INTFLAG.bit.TAMPER) {
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if (RTC->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_TAMPER) {
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RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_TAMPER;
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if (tamper_cb.cb) {
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tamper_cb.cb(tamper_cb.arg);
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