diff --git a/cpu/sam0_common/Makefile.include b/cpu/sam0_common/Makefile.include
index 85cbbe3e1f..e100f5d708 100644
--- a/cpu/sam0_common/Makefile.include
+++ b/cpu/sam0_common/Makefile.include
@@ -31,7 +31,4 @@ CFLAGS += -DDONT_USE_PREDEFINED_PERIPHERALS_HANDLERS
 # For Cortex-M cpu we use the common cortexm.ld linker script
 LINKER_SCRIPT ?= cortexm.ld
 
-# define sam0 specific pseudomodules
-PSEUDOMODULES += sam0_periph_uart_hw_fc
-
 INCLUDES += -I$(RIOTCPU)/sam0_common/include
diff --git a/cpu/sam0_common/include/periph_cpu_common.h b/cpu/sam0_common/include/periph_cpu_common.h
index 5c55a00aab..9efb0e8aea 100644
--- a/cpu/sam0_common/include/periph_cpu_common.h
+++ b/cpu/sam0_common/include/periph_cpu_common.h
@@ -212,7 +212,7 @@ typedef struct {
     SercomUsart *dev;       /**< pointer to the used UART device */
     gpio_t rx_pin;          /**< pin used for RX */
     gpio_t tx_pin;          /**< pin used for TX */
-#ifdef MODULE_SAM0_PERIPH_UART_HW_FC
+#ifdef MODULE_PERIPH_UART_HW_FC
     gpio_t rts_pin;          /**< pin used for RTS */
     gpio_t cts_pin;          /**< pin used for CTS */
 #endif
diff --git a/cpu/sam0_common/periph/uart.c b/cpu/sam0_common/periph/uart.c
index eeff0fa310..41ebccec1d 100644
--- a/cpu/sam0_common/periph/uart.c
+++ b/cpu/sam0_common/periph/uart.c
@@ -80,7 +80,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
     gpio_set(uart_config[uart].tx_pin);
     gpio_init_mux(uart_config[uart].tx_pin, uart_config[uart].mux);
 
-#ifdef MODULE_SAM0_PERIPH_UART_HW_FC
+#ifdef MODULE_PERIPH_UART_HW_FC
     /* If RTS/CTS needed, enable them */
     if (uart_config[uart].tx_pad == UART_PAD_TX_0_RTS_2_CTS_3) {
         /* Ensure RTS is defined */