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Merge pull request #11657 from Yanok35/pr-stm32-spi-af

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boards/stm32-based: allow SPI signals routed on multiple alternate functions
This commit is contained in:
Alexandre Abadie 2019-10-25 09:47:49 +02:00 committed by GitHub
commit 7761169964
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GPG Key ID: 4AEE18F83AFDEB23
50 changed files with 283 additions and 76 deletions
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10
boards/b-l072z-lrwan1/include/periph_conf.h
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@ -127,7 +127,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1,
#ifdef MODULE_PERIPH_DMA
@ -143,7 +146,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA

5
boards/b-l475e-iot01a/include/periph_conf.h
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@ -206,7 +206,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA

5
boards/i-nucleo-lrwan1/include/periph_conf.h
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@ -83,7 +83,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_PIN(PORT_A, 15),
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
},

10
boards/limifrog-v1/include/periph_conf.h
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@ -132,7 +132,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -142,7 +145,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF6,
.mosi_af = GPIO_AF6,
.miso_af = GPIO_AF6,
.sclk_af = GPIO_AF6,
.cs_af = GPIO_AF6,
.rccmask = RCC_APB1ENR_SPI3EN,
.apbbus = APB1
}

10
boards/lobaro-lorabox/include/periph_conf.h
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@ -142,7 +142,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_B, 0),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -152,7 +155,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 15),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
}

5
boards/lsn50/include/periph_conf.h
View File

@ -126,7 +126,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA

5
boards/msbiot/include/periph_conf.h
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@ -173,7 +173,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

10
boards/nucleo-f030r8/include/periph_conf.h
View File

@ -168,7 +168,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -178,7 +181,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
},

5
boards/nucleo-f031k6/include/periph_conf.h
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@ -148,7 +148,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/nucleo-f042k6/include/periph_conf.h
View File

@ -158,7 +158,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

10
boards/nucleo-f072rb/include/periph_conf.h
View File

@ -189,7 +189,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -199,7 +202,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
},

5
boards/nucleo-f091rc/include/periph_conf.h
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@ -177,7 +177,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_B, 6),
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA

10
boards/nucleo-f207zg/include/periph_conf.h
View File

@ -198,7 +198,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA
@ -214,7 +217,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_C, 2),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1,
#ifdef MODULE_PERIPH_DMA

5
boards/nucleo-f302r8/include/periph_conf.h
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@ -154,7 +154,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
}

5
boards/nucleo-f303k8/include/periph_conf.h
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@ -149,7 +149,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

15
boards/nucleo-f303re/include/periph_conf.h
View File

@ -152,7 +152,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -162,7 +165,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
},
@ -172,7 +178,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_C, 11),
.sclk_pin = GPIO_PIN(PORT_C, 10),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF6,
.mosi_af = GPIO_AF6,
.miso_af = GPIO_AF6,
.sclk_af = GPIO_AF6,
.cs_af = GPIO_AF6,
.rccmask = RCC_APB1ENR_SPI3EN,
.apbbus = APB1
}

5
boards/nucleo-f303ze/include/periph_conf.h
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@ -175,7 +175,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/nucleo-f334r8/include/periph_conf.h
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@ -151,7 +151,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

15
boards/nucleo-f401re/include/periph_conf.h
View File

@ -171,7 +171,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -181,7 +184,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
},
@ -191,7 +197,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_C, 11),
.sclk_pin = GPIO_PIN(PORT_C, 10),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF6,
.mosi_af = GPIO_AF6,
.miso_af = GPIO_AF6,
.sclk_af = GPIO_AF6,
.cs_af = GPIO_AF6,
.rccmask = RCC_APB1ENR_SPI3EN,
.apbbus = APB1
}

5
boards/nucleo-f410rb/include/periph_conf.h
View File

@ -120,7 +120,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/nucleo-f411re/include/periph_conf.h
View File

@ -149,7 +149,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/nucleo-f412zg/include/periph_conf.h
View File

@ -150,7 +150,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/nucleo-f413zh/include/periph_conf.h
View File

@ -173,7 +173,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA

5
boards/nucleo-f429zi/include/periph_conf.h
View File

@ -129,7 +129,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

15
boards/nucleo-f446re/include/periph_conf.h
View File

@ -165,7 +165,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -175,7 +178,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
},
@ -185,7 +191,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_C, 11),
.sclk_pin = GPIO_PIN(PORT_C, 10),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF6,
.mosi_af = GPIO_AF6,
.miso_af = GPIO_AF6,
.sclk_af = GPIO_AF6,
.cs_af = GPIO_AF6,
.rccmask = RCC_APB1ENR_SPI3EN,
.apbbus = APB1
}

5
boards/nucleo-f446ze/include/periph_conf.h
View File

@ -129,7 +129,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

10
boards/nucleo-f767zi/include/periph_conf.h
View File

@ -121,7 +121,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -131,7 +134,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_E, 5),
.sclk_pin = GPIO_PIN(PORT_E, 2),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI4EN,
.apbbus = APB2
}

5
boards/nucleo-l031k6/include/periph_conf.h
View File

@ -103,7 +103,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/nucleo-l053r8/include/periph_conf.h
View File

@ -118,7 +118,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/nucleo-l073rz/include/periph_conf.h
View File

@ -136,7 +136,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/nucleo-l152re/include/periph_conf.h
View File

@ -199,7 +199,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA

5
boards/nucleo-l432kc/include/periph_conf.h
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@ -162,7 +162,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/nucleo-l433rc/include/periph_conf.h
View File

@ -174,7 +174,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR1_SPI2EN,
.apbbus = APB1
}

5
boards/nucleo-l452re/include/periph_conf.h
View File

@ -175,7 +175,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},

5
boards/nucleo-l476rg/include/periph_conf.h
View File

@ -262,7 +262,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA

5
boards/nucleo-l496zg/include/periph_conf.h
View File

@ -212,7 +212,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/nucleo-l4r5zi/include/periph_conf.h
View File

@ -159,7 +159,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

15
boards/nz32-sc151/include/periph_conf.h
View File

@ -145,7 +145,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -155,7 +158,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
},
@ -165,7 +171,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_C, 11),
.sclk_pin = GPIO_PIN(PORT_C, 10),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF6,
.mosi_af = GPIO_AF6,
.miso_af = GPIO_AF6,
.sclk_af = GPIO_AF6,
.cs_af = GPIO_AF6,
.rccmask = RCC_APB1ENR_SPI3EN,
.apbbus = APB1
}

5
boards/p-l496g-cell02/include/periph_conf.h
View File

@ -193,7 +193,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}

5
boards/pyboard/include/periph_conf.h
View File

@ -134,7 +134,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA

5
boards/stm32f030f4-demo/include/periph_conf.h
View File

@ -156,7 +156,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_B, 1),
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},

10
boards/stm32f0discovery/include/periph_conf.h
View File

@ -152,7 +152,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -162,7 +165,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
}

10
boards/stm32f3discovery/include/periph_conf.h
View File

@ -186,7 +186,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -196,7 +199,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_C, 11),
.sclk_pin = GPIO_PIN(PORT_C, 10),
.cs_pin = GPIO_PIN(PORT_A, 15),
.af = GPIO_AF6,
.mosi_af = GPIO_AF6,
.miso_af = GPIO_AF6,
.sclk_af = GPIO_AF6,
.cs_af = GPIO_AF6,
.rccmask = RCC_APB1ENR_SPI3EN,
.apbbus = APB1
}

5
boards/stm32f429i-disc1/include/periph_conf.h
View File

@ -69,7 +69,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_F, 8),
.sclk_pin = GPIO_PIN(PORT_F, 7),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI5EN,
.apbbus = APB2
}

10
boards/stm32f4discovery/include/periph_conf.h
View File

@ -168,7 +168,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -178,7 +181,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
}

10
boards/stm32f723e-disco/include/periph_conf.h
View File

@ -210,7 +210,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -220,7 +223,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_I, 2),
.sclk_pin = GPIO_PIN(PORT_I, 1),
.cs_pin = GPIO_PIN(PORT_I, 0),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
},

10
boards/stm32l0538-disco/include/periph_conf.h
View File

@ -124,7 +124,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
@ -134,7 +137,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.af = GPIO_AF0,
.mosi_af = GPIO_AF0,
.miso_af = GPIO_AF0,
.sclk_af = GPIO_AF0,
.cs_af = GPIO_AF0,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1
},

5
boards/ublox-c030-u201/include/periph_conf.h
View File

@ -167,7 +167,10 @@ static const spi_conf_t spi_config[] = {
.miso_pin = GPIO_PIN(PORT_E, 5),
.sclk_pin = GPIO_PIN(PORT_E, 2),
.cs_pin = GPIO_PIN(PORT_E, 11),
.af = GPIO_AF5,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI4EN,
.apbbus = APB2
},

5
cpu/stm32_common/include/periph_cpu_common.h
View File

@ -489,7 +489,10 @@ typedef struct {
gpio_t sclk_pin; /**< SCLK pin */
gpio_t cs_pin; /**< HWCS pin, set to GPIO_UNDEF if not mapped */
#ifndef CPU_FAM_STM32F1
gpio_af_t af; /**< pin alternate function */
gpio_af_t mosi_af; /**< MOSI pin alternate function */
gpio_af_t miso_af; /**< MISO pin alternate function */
gpio_af_t sclk_af; /**< SCLK pin alternate function */
gpio_af_t cs_af; /**< HWCS pin alternate function */
#endif
uint32_t rccmask; /**< bit in the RCC peripheral enable register */
uint8_t apbbus; /**< APBx bus the device is connected to */

14
cpu/stm32_common/periph/spi.c
View File

@ -81,9 +81,9 @@ void spi_init_pins(spi_t bus)
gpio_init(spi_config[bus].mosi_pin, GPIO_OUT);
gpio_init(spi_config[bus].miso_pin, GPIO_IN);
gpio_init(spi_config[bus].sclk_pin, GPIO_OUT);
gpio_init_af(spi_config[bus].mosi_pin, spi_config[bus].af);
gpio_init_af(spi_config[bus].miso_pin, spi_config[bus].af);
gpio_init_af(spi_config[bus].sclk_pin, spi_config[bus].af);
gpio_init_af(spi_config[bus].mosi_pin, spi_config[bus].mosi_af);
gpio_init_af(spi_config[bus].miso_pin, spi_config[bus].miso_af);
gpio_init_af(spi_config[bus].sclk_pin, spi_config[bus].sclk_af);
#endif
}
@ -105,7 +105,7 @@ int spi_init_cs(spi_t bus, spi_cs_t cs)
gpio_init_af(spi_config[bus].cs_pin, GPIO_AF_OUT_PP);
#else
gpio_init(spi_config[bus].cs_pin, GPIO_OUT);
gpio_init_af(spi_config[bus].cs_pin, spi_config[bus].af);
gpio_init_af(spi_config[bus].cs_pin, spi_config[bus].cs_af);
#endif
}
else {
@ -130,9 +130,9 @@ int spi_init_with_gpio_mode(spi_t bus, spi_gpio_mode_t mode)
ret += gpio_init(spi_config[bus].mosi_pin, mode.mosi);
ret += gpio_init(spi_config[bus].miso_pin, mode.miso);
ret += gpio_init(spi_config[bus].sclk_pin, mode.sclk);
gpio_init_af(spi_config[bus].mosi_pin, spi_config[bus].af);
gpio_init_af(spi_config[bus].miso_pin, spi_config[bus].af);
gpio_init_af(spi_config[bus].sclk_pin, spi_config[bus].af);
gpio_init_af(spi_config[bus].mosi_pin, spi_config[bus].mosi_af);
gpio_init_af(spi_config[bus].miso_pin, spi_config[bus].miso_af);
gpio_init_af(spi_config[bus].sclk_pin, spi_config[bus].sclk_af);
return ret;
#endif
}