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cpu/stm32l0: add I2C driver
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f5a1e8216b
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750b98c541
@ -73,6 +73,18 @@ typedef struct {
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uint8_t chan; /**< DAC device used for this line */
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} dac_conf_t;
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/**
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* @brief I2C configuration data structure
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*/
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typedef struct {
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I2C_TypeDef *dev; /**< i2c device */
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gpio_t scl; /**< scl pin number */
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gpio_t sda; /**< sda pin number */
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gpio_mode_t pin_mode; /**< with or without pull resistor */
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gpio_af_t af; /**< I2C alternate function value */
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uint8_t ev_irqn; /**< event IRQ */
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} i2c_conf_t;
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#ifdef __cplusplus
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}
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#endif
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459
cpu/stm32l0/periph/i2c.c
Normal file
459
cpu/stm32l0/periph/i2c.c
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@ -0,0 +1,459 @@
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/*
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* Copyright (C) 2017 we-sens.com
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @addtogroup driver_periph
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* @{
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*
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* @file
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* @brief Low-level I2C driver implementation
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*
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* @note This implementation only implements the 7-bit addressing polling mode (for now
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* interrupt mode is not available)
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*
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* @author Aurélien Fillau <aurelien.fillau@we-sens.com>
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*
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* @}
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*/
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#include <stdint.h>
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#include "cpu.h"
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#include "mutex.h"
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#include "periph/i2c.h"
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#include "periph/gpio.h"
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#include "periph_conf.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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/* guard file in case no I2C device is defined */
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#if I2C_NUMOF
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/* static function definitions */
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static void _i2c_init(I2C_TypeDef *i2c, uint32_t presc, uint32_t scll,
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uint32_t sclh, uint32_t sdadel, uint32_t scldel,
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uint32_t timing);
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static void _start(I2C_TypeDef *dev, uint8_t address, uint8_t length, uint8_t rw_flag);
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static inline void _read(I2C_TypeDef *dev, uint8_t *data, int length);
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static inline void _write(I2C_TypeDef *i2c, const uint8_t *data, int length);
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static inline void _stop(I2C_TypeDef *i2c);
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/**
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* @brief Array holding one pre-initialized mutex for each I2C device
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*/
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static mutex_t locks[] = {
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#if I2C_0_EN
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[I2C_0] = MUTEX_INIT,
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#endif
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#if I2C_1_EN
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[I2C_1] = MUTEX_INIT,
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#endif
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#if I2C_2_EN
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[I2C_2] = MUTEX_INIT,
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#endif
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#if I2C_3_EN
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[I2C_3] = MUTEX_INIT
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#endif
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};
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int i2c_init_master(i2c_t dev, i2c_speed_t speed)
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{
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I2C_TypeDef *i2c;
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gpio_t scl;
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gpio_t sda;
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uint32_t presc, scll, sclh, sdadel, scldel, timing;
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/*
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* Speed configuration:
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* Example values can be found in the STM32L0xx Reference manual RM0367
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* with f_I2CCLK = 16MHz
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* t_SCLL: SCL low level counter
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* t_SCLH: SCL high level counter
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* t_SDADEL: Delay before sending SDA output
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* t_SCLDEL: SCL low level during setup-time
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*/
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switch (speed) {
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case I2C_SPEED_NORMAL:
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presc = 1;
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scll = 0x56; /* t_SCLL = 5.0us */
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sclh = 0x3E; /* t_SCLH = 4.0us */
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sdadel = 0x1; /* t_SDADEL = 500ns */
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scldel = 0xA; /* t_SCLDEL = 1250ns */
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break;
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case I2C_SPEED_FAST:
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presc = 0;
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scll = 0x2E; /* t_SCLL = 1250ns */
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sclh = 0x11; /* t_SCLH = 500ns */
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sdadel = 0x1; /* t_SDADEL = 125ns */
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scldel = 0xB; /* t_SCLDEL = 500ns */
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break;
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case I2C_SPEED_FAST_PLUS:
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presc = 0;
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scll = 0x6; /* t_SCLL = 875ns */
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sclh = 0x3; /* t_SCLH = 500ns */
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sdadel = 0x0; /* t_SDADEL = 0ns */
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scldel = 0x1; /* t_SCLDEL = 250ns */
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break;
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default:
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return -2;
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}
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/* prepare the timing register value */
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timing = ((presc << 28) | (scldel << 20) | (sdadel << 16) | (sclh << 8) | scll);
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/* read static device configuration */
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switch (dev) {
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#if I2C_0_EN
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case I2C_0:
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i2c = I2C_0_DEV;
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scl = GPIO_PIN(I2C_0_SCL_PORT, I2C_0_SCL_PIN); /* scl pin number */
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sda = GPIO_PIN(I2C_0_SDA_PORT, I2C_0_SDA_PIN); /* sda pin number */
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I2C_0_CLKEN();
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I2C_0_SCL_CLKEN();
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I2C_0_SDA_CLKEN();
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break;
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#endif
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#if I2C_1_EN
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case I2C_1:
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i2c = I2C_1_DEV;
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scl = GPIO_PIN(I2C_1_SCL_PORT, I2C_1_SCL_PIN); /* scl pin number */
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sda = GPIO_PIN(I2C_1_SDA_PORT, I2C_1_SDA_PIN); /* sda pin number */
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I2C_1_CLKEN();
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I2C_1_SCL_CLKEN();
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I2C_1_SDA_CLKEN();
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break;
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#endif
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default:
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return -1;
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}
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/* configure pins */
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gpio_init(scl, GPIO_OD_PU);
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gpio_init_af(scl, GPIO_AF4);
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gpio_init(sda, GPIO_OD_PU);
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gpio_init_af(sda, GPIO_AF4);
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/* configure device */
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_i2c_init(i2c, presc, scll, sclh, sdadel, scldel, timing);
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return 0;
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}
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static void _i2c_init(I2C_TypeDef *i2c, uint32_t presc, uint32_t scll,
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uint32_t sclh, uint32_t sdadel, uint32_t scldel,
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uint32_t timing)
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{
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/* disable device */
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i2c->CR1 &= ~(I2C_CR1_PE);
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/* configure analog noise filter */
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i2c->CR1 |= I2C_CR1_ANFOFF;
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/* configure digital noise filter */
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i2c->CR1 |= I2C_CR1_DNF;
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/* set timing registers */
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i2c->TIMINGR = timing;
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/* configure clock stretching */
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i2c->CR1 &= ~(I2C_CR1_NOSTRETCH);
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/* enable device */
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i2c->CR1 |= I2C_CR1_PE;
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}
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int i2c_acquire(i2c_t dev)
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{
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if (dev >= I2C_NUMOF) {
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return -1;
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}
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mutex_lock(&locks[dev]);
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return 0;
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}
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int i2c_release(i2c_t dev)
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{
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if (dev >= I2C_NUMOF) {
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return -1;
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}
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mutex_unlock(&locks[dev]);
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return 0;
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}
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int i2c_read_byte(i2c_t dev, uint8_t address, void *data)
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{
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return i2c_read_bytes(dev, address, data, 1);
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}
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int i2c_read_bytes(i2c_t dev, uint8_t address, void *data, int length)
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{
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I2C_TypeDef *i2c;
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switch (dev) {
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#if I2C_0_EN
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case I2C_0:
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i2c = I2C_0_DEV;
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break;
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#endif
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#if I2C_1_EN
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case I2C_1:
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i2c = I2C_1_DEV;
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break;
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#endif
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default:
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return -1;
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}
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/* start reception and send slave address */
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_start(i2c, address, length, I2C_FLAG_READ);
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/* read the data bytes */
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_read(i2c, data, length);
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/* end transmission */
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_stop(i2c);
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return length;
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}
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int i2c_read_reg(i2c_t dev, uint8_t address, uint8_t reg, void *data)
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{
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return i2c_read_regs(dev, address, reg, data, 1);
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}
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int i2c_read_regs(i2c_t dev, uint8_t address, uint8_t reg, void *data, int length)
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{
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I2C_TypeDef *i2c;
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switch (dev) {
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#if I2C_0_EN
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case I2C_0:
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i2c = I2C_0_DEV;
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break;
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#endif
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#if I2C_1_EN
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case I2C_1:
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i2c = I2C_1_DEV;
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break;
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#endif
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default:
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return -1;
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}
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/* Check to see if the bus is busy */
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while((i2c->ISR & I2C_ISR_BUSY) == I2C_ISR_BUSY) {}
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/* send start sequence and slave address */
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_start(i2c, address, 1, I2C_FLAG_WRITE);
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/* wait for ack */
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DEBUG("Waiting for ACK\n");
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while (!(i2c->ISR & I2C_ISR_TXIS)) {}
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DEBUG("Write register to read\n");
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i2c->TXDR = reg;
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/* send repeated start sequence, read registers and end transmission */
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DEBUG("ACK received, send repeated start sequence\n");
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return i2c_read_bytes(dev, address, data, length);
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}
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int i2c_write_byte(i2c_t dev, uint8_t address, uint8_t data)
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{
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return i2c_write_bytes(dev, address, &data, 1);
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}
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int i2c_write_bytes(i2c_t dev, uint8_t address, const void *data, int length)
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{
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I2C_TypeDef *i2c;
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switch (dev) {
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#if I2C_0_EN
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case I2C_0:
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i2c = I2C_0_DEV;
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break;
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#endif
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#if I2C_1_EN
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case I2C_1:
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i2c = I2C_1_DEV;
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break;
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#endif
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default:
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return -1;
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}
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/* start transmission and send slave address */
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_start(i2c, address, length, I2C_FLAG_WRITE);
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/* send out data bytes */
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_write(i2c, data, length);
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/* end transmission */
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_stop(i2c);
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return length;
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}
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int i2c_write_reg(i2c_t dev, uint8_t address, uint8_t reg, uint8_t data)
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{
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return i2c_write_regs(dev, address, reg, &data, 1);
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}
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int i2c_write_regs(i2c_t dev, uint8_t address, uint8_t reg, const void *data, int length)
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{
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I2C_TypeDef *i2c;
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switch (dev) {
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#if I2C_0_EN
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case I2C_0:
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i2c = I2C_0_DEV;
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break;
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#endif
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#if I2C_1_EN
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case I2C_1:
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i2c = I2C_1_DEV;
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break;
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#endif
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default:
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return -1;
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}
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/* Check to see if the bus is busy */
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while((i2c->ISR & I2C_ISR_BUSY) == I2C_ISR_BUSY);
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/* start transmission and send slave address */
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/* increase length because our data is register+data */
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_start(i2c, address, length+1, I2C_FLAG_WRITE);
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/* send register number */
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DEBUG("ACK received, write reg into DR\n");
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i2c->TXDR = reg;
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/* write out data bytes */
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_write(i2c, data, length);
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/* end transmission */
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_stop(i2c);
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return length;
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}
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void i2c_poweron(i2c_t dev)
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{
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switch (dev) {
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#if I2C_0_EN
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case I2C_0:
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I2C_0_CLKEN();
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break;
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#endif
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#if I2C_1_EN
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case I2C_1:
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I2C_1_CLKEN();
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break;
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#endif
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}
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}
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void i2c_poweroff(i2c_t dev)
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{
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switch (dev) {
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#if I2C_0_EN
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case I2C_0:
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while (I2C_0_DEV->ISR & I2C_ISR_BUSY) {}
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I2C_0_CLKDIS();
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break;
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#endif
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#if I2C_1_EN
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case I2C_1:
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while (I2C_1_DEV->ISR & I2C_ISR_BUSY) {}
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I2C_0_CLKDIS();
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break;
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#endif
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}
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}
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static void _start(I2C_TypeDef *dev, uint8_t address, uint8_t length, uint8_t rw_flag)
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{
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dev->CR2 = 0;
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/* set address mode to 7-bit */
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dev->CR2 &= ~(I2C_CR2_ADD10);
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/* set slave address */
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dev->CR2 &= ~(I2C_CR2_SADD);
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dev->CR2 |= (address << 1);
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/* set transfer direction */
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dev->CR2 &= ~(I2C_CR2_RD_WRN);
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dev->CR2 |= (rw_flag << I2C_CR2_RD_WRN_Pos);
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/* set number of bytes */
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dev->CR2 &= ~(I2C_CR2_NBYTES);
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dev->CR2 |= (length << I2C_CR2_NBYTES_Pos);
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/* configure autoend configuration */
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dev->CR2 &= ~(I2C_CR2_AUTOEND);
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/* generate start condition */
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DEBUG("Generate start condition\n");
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dev->CR2 |= I2C_CR2_START;
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/* Wait for the start followed by the address to be sent */
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while (!(dev->CR2 & I2C_CR2_START)) {}
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}
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static inline void _read(I2C_TypeDef *dev, uint8_t *data, int length)
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{
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for (int i = 0; i < length; i++) {
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/* wait for transfer to finish */
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DEBUG("Waiting for DR to be full\n");
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while (!(dev->ISR & I2C_ISR_RXNE)) {}
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DEBUG("DR is now full\n");
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/* read data from data register */
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data[i] = dev->RXDR;
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DEBUG("Read byte %i from DR\n", i);
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}
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}
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static inline void _write(I2C_TypeDef *dev, const uint8_t *data, int length)
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{
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for (int i = 0; i < length; i++) {
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/* wait for ack */
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DEBUG("Waiting for ACK\n");
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while (!(dev->ISR & I2C_ISR_TXIS)) {}
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/* write data to data register */
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DEBUG("Write byte %i to DR\n", i);
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dev->TXDR = data[i];
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DEBUG("Sending data\n");
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}
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}
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static inline void _stop(I2C_TypeDef *dev)
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{
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/* make sure transfer is complete */
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DEBUG("Wait for transfer to be complete\n");
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while (!(dev->ISR & I2C_ISR_TC)) {}
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/* send STOP condition */
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DEBUG("Generate stop condition\n");
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dev->CR2 |= I2C_CR2_STOP;
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}
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#endif /* I2C_NUMOF */
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