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nrf24l01p_ng: avoid explicit cast to netdev
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parent
947e305e0b
commit
73da8b3cd5
@ -156,7 +156,7 @@ static int _nrf24l01p_ng_adpt_send(gnrc_netif_t *netif, gnrc_pktsnip_t *pkt)
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assert(pkt);
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assert(netif->dev);
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netdev_t *netdev = (netdev_t *)netif->dev;
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netdev_t *netdev = netif->dev;
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gnrc_netif_hdr_t *netif_hdr = (gnrc_netif_hdr_t *)pkt->data;
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if (!netif_hdr) {
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return -EBADMSG;
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@ -190,7 +190,7 @@ static int _nrf24l01p_ng_adpt_send(gnrc_netif_t *netif, gnrc_pktsnip_t *pkt)
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uint8_t src[1 + NRF24L01P_NG_ADDR_WIDTH];
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src[0] = NRF24L01P_NG_ADDR_WIDTH;
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memcpy(src + 1,
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NRF24L01P_NG_ADDR_P1((nrf24l01p_ng_t *)netdev),
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NRF24L01P_NG_ADDR_P1(container_of(netdev, nrf24l01p_ng_t, netdev)),
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NRF24L01P_NG_ADDR_WIDTH);
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iolist_t iolist_src_addr = {
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.iol_next = ((iolist_t *)pkt->next),
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@ -112,12 +112,12 @@ nrf24l01p_ng_state_t _state_from_netif(netopt_state_t state)
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static void _nrf24l01p_ng_irq_handler(void *_dev)
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{
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nrf24l01p_ng_t *dev = (nrf24l01p_ng_t *)_dev;
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nrf24l01p_ng_t *dev = _dev;
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/* Once the IRQ pin has triggered,
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do not congest the thread´s
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message queue with IRQ events */
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gpio_irq_disable(dev->params.pin_irq);
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netdev_trigger_event_isr((netdev_t *)dev);
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netdev_trigger_event_isr(&dev->netdev);
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}
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static void _isr_max_rt(nrf24l01p_ng_t *dev)
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@ -162,7 +162,7 @@ static void _isr_tx_ds(nrf24l01p_ng_t *dev)
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static int _init(netdev_t *netdev)
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{
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nrf24l01p_ng_t *dev = (nrf24l01p_ng_t *)netdev;
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nrf24l01p_ng_t *dev = container_of(netdev, nrf24l01p_ng_t, netdev);
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if (dev->params.config.cfg_data_rate >= NRF24L01P_NG_RF_DR_NUM_OF ||
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dev->params.config.cfg_crc == NRF24L01P_NG_CRC_0BYTE ||
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dev->params.config.cfg_channel >= NRF24L01P_NG_NUM_CHANNELS) {
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@ -299,7 +299,7 @@ static int _recv(netdev_t *netdev, void *buf, size_t len, void *info)
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DEBUG_PUTS("[nrf24l01p_ng] Return upper frame estimation");
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return NRF24L01P_NG_ADDR_WIDTH + NRF24L01P_NG_MAX_PAYLOAD_WIDTH;
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}
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nrf24l01p_ng_t *dev = (nrf24l01p_ng_t *)netdev;
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nrf24l01p_ng_t *dev = container_of(netdev, nrf24l01p_ng_t, netdev);
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uint8_t pl_width;
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uint8_t status = nrf24l01p_ng_read_rx_pl_width(dev, &pl_width);
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uint8_t pno = NRF24L01P_NG_VAL_RX_P_NO(status);
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@ -373,7 +373,7 @@ static int _send(netdev_t *netdev, const iolist_t *iolist)
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DEBUG_PUTS("[nrf24l01p_ng] No Tx address or no payload");
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return -ENOTSUP;
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}
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nrf24l01p_ng_t *dev = (nrf24l01p_ng_t *)netdev;
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nrf24l01p_ng_t *dev = container_of(netdev, nrf24l01p_ng_t, netdev);
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uint8_t pl_width = 0;
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const uint8_t bcast_addr[] = NRF24L01P_NG_BROADCAST_ADDR;
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uint8_t payload[NRF24L01P_NG_MAX_PAYLOAD_WIDTH];
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@ -457,7 +457,7 @@ static int _send(netdev_t *netdev, const iolist_t *iolist)
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*/
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static void _isr(netdev_t *netdev)
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{
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nrf24l01p_ng_t *dev = (nrf24l01p_ng_t *)netdev;
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nrf24l01p_ng_t *dev = container_of(netdev, nrf24l01p_ng_t, netdev);
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nrf24l01p_ng_acquire(dev);
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gpio_irq_enable(dev->params.pin_irq);
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@ -517,7 +517,7 @@ static void _isr(netdev_t *netdev)
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*/
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static int _get(netdev_t *netdev, netopt_t opt, void *val, size_t max_len)
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{
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nrf24l01p_ng_t *dev = (nrf24l01p_ng_t *)netdev;
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nrf24l01p_ng_t *dev = container_of(netdev, nrf24l01p_ng_t, netdev);
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(void)max_len; /* only used in assert() */
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switch (opt) {
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@ -608,7 +608,7 @@ static int _get(netdev_t *netdev, netopt_t opt, void *val, size_t max_len)
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*/
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static int _set(netdev_t *netdev, netopt_t opt, const void *val, size_t len)
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{
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nrf24l01p_ng_t *dev = (nrf24l01p_ng_t *)netdev;
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nrf24l01p_ng_t *dev = container_of(netdev, nrf24l01p_ng_t, netdev);
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switch (opt) {
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case NETOPT_ADDRESS: {
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