mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2025-01-18 12:52:44 +01:00
added support for board wsn430-v1_3b
This commit is contained in:
parent
0fe0018da7
commit
70a9c5f2d1
@ -13,6 +13,10 @@ ifeq ($(BOARD),msb-430h)
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INCLUDES += -I$(RIOTBOARD)/msb-430-common/include/
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INCLUDES += -I$(RIOTBOARD)/msb-430-common/include/
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INCLUDES += -I$(RIOTBOARD)/msb-430-common/drivers/include/
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INCLUDES += -I$(RIOTBOARD)/msb-430-common/drivers/include/
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endif
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endif
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ifeq ($(BOARD),wsn430-v1_3b)
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INCLUDES += -I$(RIOTBOARD)/wsn430-v1_3b/include/
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INCLUDES += -I$(RIOTBOARD)/wsn430-common/include/
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endif
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ifeq ($(BOARD),chronos)
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ifeq ($(BOARD),chronos)
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INCLUDES += -I$(RIOTBOARD)/chronos/include/
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INCLUDES += -I$(RIOTBOARD)/chronos/include/
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INCLUDES += -I$(RIOTBOARD)/chronos/drivers/include/
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INCLUDES += -I$(RIOTBOARD)/chronos/drivers/include/
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33
wsn430-common/Makefile
Normal file
33
wsn430-common/Makefile
Normal file
@ -0,0 +1,33 @@
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SRC = $(wildcard *.c)
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BINDIR = $(RIOTBOARD)/$(BOARD)/bin/
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OBJ = $(SRC:%.c=$(BINDIR)%.o)## defines
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DEP = $(SRC:%.c=$(BINDIR)%.d)
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INCLUDES += -I$(RIOTBOARD)/wsn430-common/include/ -I${RIOTBOARD}/${BOARD}/include/
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INCLUDES += -I$(RIOTBASE)/cpu/msp430-common/include/
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INCLUDES += -I$(RIOTBASE)/cpu/mspx16x/include/
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INCLUDES += -I$(RIOTBASE)/drivers/include/
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.PHONY: $(BINDIR)$(ARCH)
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all: $(BINDIR)$(ARCH)
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#$(MAKE) -C drivers
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$(BINDIR)$(ARCH): $(OBJ)
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echo $(AR) rcs $(BINDIR)$(ARCH) $(OBJ)
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$(AR) rcs $(BINDIR)$(ARCH) $(OBJ)
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# pull in dependency info for *existing* .o files
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-include $(OBJ:.o=.d)
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# compile and generate dependency info
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$(BINDIR)%.o: %.c
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$(CC) $(CFLAGS) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -c $*.c -o $(BINDIR)$*.o
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$(CC) $(CFLAGS) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -MM $*.c > $(BINDIR)$*.d
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@printf "$(BINDIR)"|cat - $(BINDIR)$*.d > /tmp/riot_out && mv /tmp/riot_out $(BINDIR)$*.d
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# remove compilation products
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clean:
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#$(MAKE) -C drivers clean
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rm -f $(OBJ) $(DEP)
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rm -f $(BINDIR)$(ARCH)
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23
wsn430-common/Makefile.include
Normal file
23
wsn430-common/Makefile.include
Normal file
@ -0,0 +1,23 @@
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## the cpu to build for
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export CPU = msp430x16x
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export MCU = msp430f1611
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# toolchain config
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export PREFIX = @msp430-
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export CC = @$(PREFIX)gcc
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export AR = @$(PREFIX)ar
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export CFLAGS += -std=gnu99 -Wstrict-prototypes -gdwarf-2 -Os -Wall -mmcu=$(MCU)
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export ASFLAGS += -mmcu=$(MCU) --defsym $(MCU)=1 --gdwarf-2
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export AS = $(PREFIX)as
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export LINK = $(PREFIX)gcc
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export SIZE = $(PREFIX)size
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export OBJCOPY = $(PREFIX)objcopy
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export LINKFLAGS = -mmcu=$(MCU) -lgcc $(RIOTBASE)/bin/startup.o
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export FLASHER = mspdebug
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ifeq ($(strip $(PORT)),)
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export PORT = /dev/ttyUSB0
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endif
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export HEXFILE = bin/$(PROJECT).hex
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export FFLAGS = -d $(PORT) -j uif "prog $(HEXFILE)"
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export INCLUDES += -I $(RIOTCPU)/msp430-common/include/
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19
wsn430-common/board_config.c
Normal file
19
wsn430-common/board_config.c
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@ -0,0 +1,19 @@
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#include <stdint.h>
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#include <string.h>
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#include <board-conf.h>
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#include <config.h>
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#include <flashrom.h>
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void config_load(void) {
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if (*((uint16_t*) INFOMEM) == CONFIG_KEY) {
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memcpy(&sysconfig, (char*) (INFOMEM + sizeof(CONFIG_KEY)), sizeof(sysconfig));
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}
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else {
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config_save();
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}
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}
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uint8_t config_save(void) {
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configmem_t mem = { CONFIG_KEY, sysconfig };
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return (flashrom_erase((uint8_t*) INFOMEM) && flashrom_write((uint8_t*) INFOMEM, (char*) &mem, sizeof(mem)));
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}
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150
wsn430-common/board_init.c
Normal file
150
wsn430-common/board_init.c
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@ -0,0 +1,150 @@
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/*
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* board_init.c - Implementation of functions to init board.
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* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
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*
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* This source code is licensed under the GNU General Public License,
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* Version 3. See the file LICENSE for more details.
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*/
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#include "cpu.h"
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#include "board.h"
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#include "kernel_intern.h"
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#include "msp430.h"
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#include "debug.h"
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volatile static uint32_t __msp430_cpu_speed = MSP430_INITIAL_CPU_SPEED;
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typedef enum {
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MCLK_2MHZ_SCLK_1MHZ = 1000002uL,
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MCLK_4MHZ_SCLK_1MHZ = 1000004uL,
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MCLK_8MHZ_SCLK_1MHZ = 1000008uL,
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MCLK_8MHZ_SCLK_8MHZ = 8000000uL
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}speed_t;
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/*---------------------------------------------------------------------------*/
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static uint8_t calc_umctl(uint16_t br) {
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// from TI slaa049
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register uint8_t CMOD = 256 * br - 256 * (br + 1) / 2;
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register uint8_t c = 0;
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register int i = 0;
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register uint8_t a = CMOD;
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a <<= 1;
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do {
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if( a & 0x80 ) { // Overflow to integer?
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a = a - 128 + CMOD; // Yes, subtract 1.000000
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c |= 0x80;
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} else {
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a += CMOD; // No, add fraction
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}
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if( i == 7 ) {
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return c;
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}
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i++;
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c >>= 1;
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} while(1);
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}
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static void msb_ports_init(void)
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{
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// Port 1: GDO, Flash, BSL TX
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P1SEL = 0x02; // Port1 Select: 00000010 = 0x02
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P1OUT = 0x00; // Port1 Output: 00000000 = 0x00
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P1DIR = 0xE7; // Port1 Direction: 11100111 = 0xE7
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// Port 2: GPIO, BSL RX, 1wire
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P2SEL = 0x04; // Port2 Select: 00000100 = 0x04
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P2OUT = 0x00; // Port2 Output: 00000000 = 0x00
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P2DIR = 0xFF; // Port2 Direction: 11111111 = 0xFF
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// Port 3: UART
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P3SEL = 0xFE; // Port3 Select: 11111110 = 0xFE
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P3OUT = 0x00; // Port3 Output: 00000000 = 0x00
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P3DIR = 0xFF; // Port3 Direction: 11111111 = 0xFF
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// Port 4: CS
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P4SEL = 0x00; // Port4 Select: 00000000 = 0x00
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P4OUT = 0x14; // Port4 Output: 00010100 = 0x14
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P4DIR = 0xFF; // Port4 Direction: 11111111 = 0xFF
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// Port 5: SPI, LED
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P5SEL = 0x0E; // Port5 Select: 00001110 = 0x0E
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P5OUT = 0x70; // Port5 Output: 01110000 = 0x70
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P5DIR = 0x70; // Port5 Direction: 01110000 = 0x70
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P6SEL = 0xFF; // Port6 Select: 11111111 = 0xFF
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P6OUT = 0x00; // Port6 Output: 00000000 = 0x00
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P6DIR = 0xFF; // Port6 Direction: 11111000 = 0xF8
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}
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void msp430_set_cpu_speed(uint32_t speed)
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{
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dint();
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__msp430_cpu_speed = speed;
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msp430_init_dco();
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uint16_t br;
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U0CTL = SWRST;
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U0CTL = SWRST | CHAR; // 8-bit character
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U0TCTL = SSEL1 | TXEPT; // UCLK = SCLK
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U0RCTL = 0;
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// activate
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ME1 |= UTXE0 + URXE0; // Enable USART0 TXD/RXD
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br = (uint16_t)((__msp430_cpu_speed & 0xFFFFF0) / 115200uL);
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UBR00 = br; // set baudrate
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UBR10 = br>>8;
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UMCTL0 = calc_umctl(br); // set modulation
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U0CTL &= ~SWRST;
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//URCTL0 |= URXEIE; // allow chars to interrupt
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IE1 |= URXIE0; // enable rx interrupt
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IFG1 &= ~UTXIFG0;
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eint();
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}
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/*---------------------------------------------------------------------------*/
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void msp430_init_dco(void)
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{
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/*----------------------- use external oszillator -------------------------*/
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uint16_t i;
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// Stop watchdog
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WDTCTL = WDTPW + WDTHOLD;
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BCSCTL1 = RSEL2;
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// Wait for xtal to stabilize
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do {
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IFG1 &= ~OFIFG; // Clear oscillator fault flag
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for (i = 0xFF; i > 0; i--); // Time for flag to set
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}
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while ((IFG1 & OFIFG) != 0); // Oscillator fault flag still set?
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switch (__msp430_cpu_speed) {
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case MCLK_2MHZ_SCLK_1MHZ:
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BCSCTL2 = (SELM_2 | DIVM_2) | (SELS | DIVS_3);
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break;
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case MCLK_4MHZ_SCLK_1MHZ:
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BCSCTL2 = (SELM_2 | DIVM_1) | (SELS | DIVS_3);
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break;
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case MCLK_8MHZ_SCLK_1MHZ:
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BCSCTL2 = SELM_2 | (SELS | DIVS_3);
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break;
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default:
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BCSCTL2 = SELM_2 + SELS; // MCLK and SMCLK = XT2 (safe)
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break;
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}
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}
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void board_init() {
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msp430_cpu_init();
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msb_ports_init();
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LED_RED_ON;
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msp430_set_cpu_speed(MCLK_8MHZ_SCLK_8MHZ);
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}
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0
wsn430-common/drivers/Makefile
Normal file
0
wsn430-common/drivers/Makefile
Normal file
6
wsn430-common/include/board-conf.h
Normal file
6
wsn430-common/include/board-conf.h
Normal file
@ -0,0 +1,6 @@
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#ifndef BOARD_CONF_H
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#define BOARD_CONF_H
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#define INFOMEM (0x1000)
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#endif /* BOARD-CONF_H */
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63
wsn430-common/uart0.c
Normal file
63
wsn430-common/uart0.c
Normal file
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/*
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* uart0.c - Implementation of the uart.
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* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
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*
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* This source code is licensed under the GNU General Public License,
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* Version 3. See the file LICENSE for more details.
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*/
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#include "board.h"
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#define UART0_TX U0TXBUF
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#define UART0_WAIT_TXDONE() while( (U0TCTL & TXEPT) == 0 ) { _NOP(); }
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#include <stdio.h>
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#include <kernel.h>
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#include <board_uart0.h>
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int putchar(int c)
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{
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UART0_TX = c;
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UART0_WAIT_TXDONE();
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if (c == 10) {
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UART0_TX = 13;
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UART0_WAIT_TXDONE();
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}
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return c;
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}
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void usart0irq(void);
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/**
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* \brief the interrupt function
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*/
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interrupt(USART0RX_VECTOR) usart0irq(void) {
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int dummy = 0;
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/* Check status register for receive errors. */
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if(U0RCTL & RXERR) {
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if (U0RCTL & FE) {
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puts("rx framing error");
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}
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if (U0RCTL & OE) {
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puts("rx overrun error");
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}
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if (U0RCTL & PE) {
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puts("rx parity error");
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}
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if (U0RCTL & BRK) {
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puts("rx break error");
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}
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/* Clear error flags by forcing a dummy read. */
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dummy = U0RXBUF;
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}
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#ifdef MODULE_UART0
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else if (uart0_handler_pid) {
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dummy = U0RXBUF;
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uart0_handle_incoming(dummy);
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uart0_notify_thread();
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}
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#endif
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}
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36
wsn430-v1_3b/Makefile
Normal file
36
wsn430-v1_3b/Makefile
Normal file
@ -0,0 +1,36 @@
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SRC = $(wildcard *.c)
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BINDIR = bin/
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OBJ = $(SRC:%.c=$(BINDIR)%.o)## defines
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export ARCH = wsn430-v1_3b_base.a
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DEP = $(SRC:%.c=$(BINDIR)%.d)
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INCLUDES += -I${RIOTBASE}/core/include/
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INCLUDES += -Iinclude/ -I$(RIOTBOARD)/wsn430-common/include/
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INCLUDES += -I$(RIOTBASE)/cpu/msp430-common/include/ -I$(RIOTBASE)/cpu/msp430x16x/include/
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INCLUDES += -I$(RIOTBASE)/drivers/cc110x_ng/include/ -I$(RIOTBASE)/sys/include
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#INCLUDES += -I/usr/msp430/include/
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all: $(BINDIR)$(ARCH)
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$(MAKE) -C ../wsn430-common
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$(BINDIR)$(ARCH): $(OBJ)
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$(AR) rcs $(BINDIR)$(ARCH) $(OBJ)
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# pull in dependency info for *existing* .o files
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-include $(OBJ:.o=.d)
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# compile and generate dependency info
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$(BINDIR)%.o: %.c
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mkdir -p $(BINDIR)
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$(CC) $(CFLAGS) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -c $*.c -o $(BINDIR)$*.o
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$(CC) $(CFLAGS) $(INCLUDES) $(BOARDINCLUDE) $(PROJECTINCLUDE) $(CPUINCLUDE) -MM $*.c > $(BINDIR)$*.d
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@printf "$(BINDIR)"|cat - $(BINDIR)$*.d > /tmp/riot_out && mv /tmp/riot_out $(BINDIR)$*.d
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||||||
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# remove compilation products
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clean:
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$(MAKE) -C ../wsn430-common clean
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rm -f $(BINDIR)$(ARCH) $(OBJ) $(DEP)
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@if [ -d $(BINDIR) ] ; \
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then rmdir $(BINDIR) ; \
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fi
|
7
wsn430-v1_3b/Makefile.dep
Normal file
7
wsn430-v1_3b/Makefile.dep
Normal file
@ -0,0 +1,7 @@
|
|||||||
|
ifneq (,$(findstring cc110x_ng,$(USEMODULE)))
|
||||||
|
ifeq (,$(findstring cc110x_spi,$(USEMODULE)))
|
||||||
|
USEMODULE += cc110x_spi
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
|
||||||
|
USEMODULE += msp430_common
|
3
wsn430-v1_3b/Makefile.include
Normal file
3
wsn430-v1_3b/Makefile.include
Normal file
@ -0,0 +1,3 @@
|
|||||||
|
include $(RIOTBOARD)/$(BOARD)/Makefile.dep
|
||||||
|
|
||||||
|
include $(RIOTBOARD)/wsn430-common/Makefile.include
|
206
wsn430-v1_3b/driver_cc110x.c
Normal file
206
wsn430-v1_3b/driver_cc110x.c
Normal file
@ -0,0 +1,206 @@
|
|||||||
|
/*
|
||||||
|
* driver_cc110x.c - Implementation of the board dependent cc1100 functions.
|
||||||
|
* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
|
||||||
|
*
|
||||||
|
* This source code is licensed under the GNU General Public License,
|
||||||
|
* Version 3. See the file LICENSE for more details.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <stdio.h>
|
||||||
|
|
||||||
|
#include <board.h>
|
||||||
|
#include <cpu.h>
|
||||||
|
#include <irq.h>
|
||||||
|
|
||||||
|
#include <cc110x_ng.h>
|
||||||
|
#include <cc110x-arch.h>
|
||||||
|
|
||||||
|
#define CC1100_GDO0 (P1IN & 0x08) // read serial I/O (GDO0)
|
||||||
|
#define CC1100_GDO1 (P5IN & 0x04) // read serial I/O (GDO1)
|
||||||
|
#define CC1100_GDO2 (P1IN & 0x10) // read serial I/O (GDO2)
|
||||||
|
|
||||||
|
#define CC1100_CS_LOW (P4OUT &= ~0x04)
|
||||||
|
#define CC1100_CS_HIGH (P4OUT |= 0x04)
|
||||||
|
|
||||||
|
#define CC1100_GDO1_LOW_COUNT (2700) // loop count (timeout ~ 500 us) to wait
|
||||||
|
#define CC1100_GDO1_LOW_RETRY (100) // max. retries for GDO1 to go low
|
||||||
|
|
||||||
|
volatile int abort_count;
|
||||||
|
volatile int retry_count = 0;
|
||||||
|
|
||||||
|
void cc110x_gdo0_enable(void)
|
||||||
|
{
|
||||||
|
P1IFG &= ~0x08; /* Clear IFG for GDO0 */
|
||||||
|
P1IE |= 0x08; /* Enable interrupt for GDO0 */
|
||||||
|
}
|
||||||
|
|
||||||
|
void cc110x_gdo0_disable(void)
|
||||||
|
{
|
||||||
|
P1IE &= ~0x08; /* Disable interrupt for GDO0 */
|
||||||
|
P1IFG &= ~0x08; /* Clear IFG for GDO0 */
|
||||||
|
}
|
||||||
|
|
||||||
|
void cc110x_gdo2_enable(void)
|
||||||
|
{
|
||||||
|
P1IFG &= ~0x10; /* Clear IFG for GDO2 */
|
||||||
|
P1IE |= 0x10; /* Enable interrupt for GDO2 */
|
||||||
|
}
|
||||||
|
|
||||||
|
void cc110x_gdo2_disable(void)
|
||||||
|
{
|
||||||
|
P1IE &= ~0x10; /* Disable interrupt for GDO2 */
|
||||||
|
P1IFG &= ~0x10; /* Clear IFG for GDO2 */
|
||||||
|
}
|
||||||
|
|
||||||
|
void cc110x_before_send(void)
|
||||||
|
{
|
||||||
|
// Disable GDO2 interrupt before sending packet
|
||||||
|
cc110x_gdo2_disable();
|
||||||
|
}
|
||||||
|
|
||||||
|
void cc110x_after_send(void)
|
||||||
|
{
|
||||||
|
// Enable GDO2 interrupt after sending packet
|
||||||
|
cc110x_gdo2_enable();
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
int cc110x_get_gdo0(void) {
|
||||||
|
return CC1100_GDO0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int cc110x_get_gdo1(void) {
|
||||||
|
return CC1100_GDO1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int cc110x_get_gdo2(void) {
|
||||||
|
return CC1100_GDO2;
|
||||||
|
}
|
||||||
|
|
||||||
|
void cc110x_spi_cs(void)
|
||||||
|
{
|
||||||
|
CC1100_CS_LOW;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t cc110x_txrx(uint8_t data)
|
||||||
|
{
|
||||||
|
/* Ensure TX Buf is empty */
|
||||||
|
long c = 0;
|
||||||
|
IFG2 &= ~UTXIFG1;
|
||||||
|
IFG2 &= ~URXIFG1;
|
||||||
|
U1TXBUF = data;
|
||||||
|
while(!(IFG2 & UTXIFG1)) {
|
||||||
|
if (c++ == 1000000) {
|
||||||
|
puts("cc110x_txrx alarm()");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/* Wait for Byte received */
|
||||||
|
c = 0;
|
||||||
|
while(!(IFG2 & URXIFG1)) {
|
||||||
|
if (c++ == 1000000) {
|
||||||
|
puts("cc110x_txrx alarm()");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return U1RXBUF;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void cc110x_spi_select(void)
|
||||||
|
{
|
||||||
|
// Switch to GDO mode
|
||||||
|
P5SEL &= ~0x04;
|
||||||
|
P5DIR &= ~0x04;
|
||||||
|
cs_low:
|
||||||
|
// CS to low
|
||||||
|
abort_count = 0;
|
||||||
|
CC1100_CS_LOW;
|
||||||
|
// Wait for SO to go low (voltage regulator
|
||||||
|
// has stabilized and the crystal is running)
|
||||||
|
loop:
|
||||||
|
// asm volatile ("nop");
|
||||||
|
if (CC1100_GDO1) {
|
||||||
|
abort_count++;
|
||||||
|
if (abort_count > CC1100_GDO1_LOW_COUNT) {
|
||||||
|
retry_count++;
|
||||||
|
if (retry_count > CC1100_GDO1_LOW_RETRY) {
|
||||||
|
puts("[CC1100 SPI] fatal error\n");
|
||||||
|
goto final;
|
||||||
|
}
|
||||||
|
CC1100_CS_HIGH;
|
||||||
|
goto cs_low; // try again
|
||||||
|
}
|
||||||
|
goto loop;
|
||||||
|
}
|
||||||
|
final:
|
||||||
|
/* Switch to SPI mode */
|
||||||
|
P5SEL |= 0x04;
|
||||||
|
}
|
||||||
|
|
||||||
|
void cc110x_spi_unselect(void) {
|
||||||
|
CC1100_CS_HIGH;
|
||||||
|
}
|
||||||
|
|
||||||
|
void cc110x_init_interrupts(void)
|
||||||
|
{
|
||||||
|
unsigned int state = disableIRQ(); /* Disable all interrupts */
|
||||||
|
P1SEL = 0x00; /* must be <> 1 to use interrupts */
|
||||||
|
P1IES |= 0x10; /* Enables external interrupt on low edge (for GDO2) */
|
||||||
|
P1IE |= 0x10; /* Enable interrupt */
|
||||||
|
P1IFG &= ~0x10; /* Clears the interrupt flag */
|
||||||
|
P1IE &= ~0x08; /* Disable interrupt for GDO0 */
|
||||||
|
P1IFG &= ~0x08; /* Clear IFG for GDO0 */
|
||||||
|
restoreIRQ(state); /* Enable all interrupts */
|
||||||
|
}
|
||||||
|
|
||||||
|
void cc110x_spi_init(uint8_t clockrate)
|
||||||
|
{
|
||||||
|
// Switch off async UART
|
||||||
|
while(!(U1TCTL & TXEPT)); // Wait for empty UxTXBUF register
|
||||||
|
IE2 &= ~(URXIE1 + UTXIE1); // Disable USART1 receive&transmit interrupt
|
||||||
|
ME2 &= ~(UTXE1 + URXE1);
|
||||||
|
P5DIR |= 0x0A; // output for CLK and SIMO
|
||||||
|
P5DIR &= ~(0x04); // input for SOMI
|
||||||
|
P5SEL |= 0x0E; // Set pins as SPI
|
||||||
|
|
||||||
|
// Keep peripheral in reset state
|
||||||
|
U1CTL = SWRST;
|
||||||
|
|
||||||
|
// 8-bit SPI Master 3-pin mode, with SMCLK as clock source
|
||||||
|
// CKPL works also, but not CKPH+CKPL or none of them!!
|
||||||
|
U1CTL |= CHAR + SYNC + MM;
|
||||||
|
U1TCTL = CKPH + SSEL1 + SSEL0 + STC;
|
||||||
|
|
||||||
|
// Ignore clockrate argument for now, just use clock source/2
|
||||||
|
// SMCLK = 8 MHz
|
||||||
|
U1BR0 = 0x02; // Ensure baud rate >= 2
|
||||||
|
U1BR1 = 0x00;
|
||||||
|
U1MCTL = 0x00; // No modulation
|
||||||
|
U1RCTL = 0x00; // Reset Receive Control Register
|
||||||
|
|
||||||
|
// Enable SPI mode
|
||||||
|
ME2 |= USPIE1;
|
||||||
|
|
||||||
|
// Release for operation
|
||||||
|
U1CTL &= ~SWRST;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* CC1100 receive interrupt
|
||||||
|
*/
|
||||||
|
interrupt (PORT1_VECTOR) __attribute__ ((naked)) cc110x_isr(void){
|
||||||
|
__enter_isr();
|
||||||
|
/* Check IFG */
|
||||||
|
if ((P1IFG & 0x10) != 0) {
|
||||||
|
P1IFG &= ~0x10;
|
||||||
|
cc110x_gdo2_irq();
|
||||||
|
}
|
||||||
|
else if ((P2IFG & 0x08) != 0) {
|
||||||
|
cc110x_gdo0_irq();
|
||||||
|
P1IE &= ~0x08; // Disable interrupt for GDO0
|
||||||
|
P1IFG &= ~0x08; // Clear IFG for GDO0
|
||||||
|
} else {
|
||||||
|
puts("cc110x_isr(): unexpected IFG!");
|
||||||
|
/* Should not occur - only GDO1 and GDO2 interrupts are enabled */
|
||||||
|
}
|
||||||
|
__exit_isr();
|
||||||
|
}
|
31
wsn430-v1_3b/include/board.h
Normal file
31
wsn430-v1_3b/include/board.h
Normal file
@ -0,0 +1,31 @@
|
|||||||
|
#ifndef _MSB_BOARD_H
|
||||||
|
#define _MSB_BOARD_H
|
||||||
|
|
||||||
|
//MSB430 core
|
||||||
|
#define MSP430_INITIAL_CPU_SPEED 800000uL
|
||||||
|
#define MSP430_HAS_DCOR 0
|
||||||
|
#define MSP430_HAS_EXTERNAL_CRYSTAL 1
|
||||||
|
|
||||||
|
/* LEDs ports MSB430 */
|
||||||
|
#define LEDS_PxDIR P5DIR
|
||||||
|
#define LEDS_PxOUT P5OUT
|
||||||
|
#define LEDS_CONF_RED 0x04
|
||||||
|
#define LEDS_CONF_GREEN 0x05
|
||||||
|
#define LEDS_CONF_BLUE 0x06
|
||||||
|
|
||||||
|
#define LED_RED_ON LEDS_PxOUT &=~LEDS_CONF_RED
|
||||||
|
#define LED_RED_OFF LEDS_PxOUT |= LEDS_CONF_RED
|
||||||
|
#define LED_RED_TOGGLE LEDS_PxOUT ^= LEDS_CONF_RED
|
||||||
|
|
||||||
|
#define LED_GREEN_ON LEDS_PxOUT &=~LEDS_CONF_GREEN
|
||||||
|
#define LED_GREEN_OFF LEDS_PxOUT |= LEDS_CONF_GREEN
|
||||||
|
#define LED_GREEN_TOGGLE LEDS_PxOUT ^= LEDS_CONF_GREEN
|
||||||
|
|
||||||
|
#define LED_BLUE_ON LEDS_PxOUT &=~LEDS_CONF_BLUE
|
||||||
|
#define LED_BLUE_OFF LEDS_PxOUT |= LEDS_CONF_BLUE
|
||||||
|
#define LED_BLUE_TOGGLE LEDS_PxOUT ^= LEDS_CONF_BLUE
|
||||||
|
|
||||||
|
#include <msp430x16x.h>
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
#endif // _MSB_BOARD_H
|
Loading…
Reference in New Issue
Block a user