RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2025-01-17 05:32:45 +01:00
Code Releases Activity

cpu/stm32: Provide spi_mode_t

Browse Source 
This doesn't change the firmware, since for all STM32 MCUs with an
SPI driver the register setting in the mode did match the SPI mode
number by chance. But for some STM32 MCUs with no SPI driver yet
the register layout is indeed different. This will help to provide an
SPI driver for them as well.
This commit is contained in:
Marian Buschsieweke 2023-11-10 17:46:10 +01:00
parent 097b99f4f2
commit 7057aa674d
No known key found for this signature in database
GPG Key ID: 77AA882EC78084E6
1 changed files with 30 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
cpu/stm32/include/periph_cpu.h
View File

@ -170,6 +170,36 @@ typedef struct {
#define USBDEV_NUM_ENDPOINTS 8
#endif
/* unify names across STM32 families */
#ifdef SPI_CR1_CPHA_Msk
# define STM32_SPI_CPHA_Msk SPI_CR1_CPHA_Msk
#endif
#ifdef SPI_CFG2_CPHA_Msk
# define STM32_SPI_CPHA_Msk SPI_CFG2_CPHA_Msk
#endif
#ifdef SPI_CR1_CPOL_Msk
# define STM32_SPI_CPOL_Msk SPI_CR1_CPOL_Msk
#endif
#ifdef SPI_CFG2_CPOL_Msk
# define STM32_SPI_CPOL_Msk SPI_CFG2_CPOL_Msk
#endif
/**
* @name Override the SPI mode values
*
* As the mode is set in bit 3 and 2 of the configuration register, we put the
* correct configuration there
* @{
*/
#define HAVE_SPI_MODE_T
typedef enum {
SPI_MODE_0 = 0, /**< CPOL=0, CPHA=0 */
SPI_MODE_1 = STM32_SPI_CPHA_Msk, /**< CPOL=0, CPHA=1 */
SPI_MODE_2 = STM32_SPI_CPOL_Msk, /**< CPOL=1, CPHA=0 */
SPI_MODE_3 = STM32_SPI_CPOL_Msk | STM32_SPI_CPHA_Msk, /**< CPOL=1, CPHA=0 */
} spi_mode_t;
/** @} */
#endif /* !DOXYGEN */
#ifdef __cplusplus